3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

Functional description The AS4LC8M8S0 and AS4LC4M16S0 are high-performance 64-megabit CMOS Synchronous Dynamic Random Access Memory (SDRAM) devices organized as 2,097,152 words × 8 bits × 4 banks, and 1,048,576 words × 16 bits × 4 banks, respectively. Very high bandwidth is achieved using a pipel

文件：566.2 Kbytes 页数：24 Pages

ALSC

3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

Functional description The AS4LC8M8S0 and AS4LC4M16S0 are high-performance 64-megabit CMOS Synchronous Dynamic Random Access Memory (SDRAM) devices organized as 2,097,152 words × 8 bits × 4 banks, and 1,048,576 words × 16 bits × 4 banks, respectively. Very high bandwidth is achieved using a pipel

文件：566.2 Kbytes 页数：24 Pages

ALSC

3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

Functional description The AS4LC8M8S0 and AS4LC4M16S0 are high-performance 64-megabit CMOS Synchronous Dynamic Random Access Memory (SDRAM) devices organized as 2,097,152 words × 8 bits × 4 banks, and 1,048,576 words × 16 bits × 4 banks, respectively. Very high bandwidth is achieved using a pipel

文件：566.2 Kbytes 页数：24 Pages

ALSC

3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

Functional description The AS4LC8M8S0 and AS4LC4M16S0 are high-performance 64-megabit CMOS Synchronous Dynamic Random Access Memory (SDRAM) devices organized as 2,097,152 words × 8 bits × 4 banks, and 1,048,576 words × 16 bits × 4 banks, respectively. Very high bandwidth is achieved using a pipel

文件：566.2 Kbytes 页数：24 Pages

ALSC

3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

Functional description The AS4LC8M8S0 and AS4LC4M16S0 are high-performance 64-megabit CMOS Synchronous Dynamic Random Access Memory (SDRAM) devices organized as 2,097,152 words × 8 bits × 4 banks, and 1,048,576 words × 16 bits × 4 banks, respectively. Very high bandwidth is achieved using a pipel

文件：566.2 Kbytes 页数：24 Pages

ALSC

4M x 4 CMOS DRAM WITH FAST PAGE MODE, 3.3V

GENERAL DESCRIPTION The Austin Semiconductor, Inc. AS4C4M4DG is a 4,194,304 x 4 bit Fast Page Mode CMOS DRAM offering high speed random access of memory cells within the same row. This device features a +5V (±10) power supply, refresh cycle (2K), and fast access times (60 and 70ns). FEATURES •

文件：2.61017 Mbytes 页数：19 Pages

AUSTIN

4 MEG x 4 DRAM 3.3V, EDO PAGE MODE

GENERAL DESCRIPTION The AS4LC4M4 is a randomly accessed solid-state memory containing 16,777,216 bits organized in a x4 configuration. FEATURES • Industry-standard x4 pinout, timing, functions and packages • High-performance CMOS silicon-gate process • Single +3.3V ±0.3V power supply • Low

文件：191.71 Kbytes 页数：20 Pages

AUSTIN

4M x 4 CMOS DRAM WITH FAST PAGE MODE, 3.3V

GENERAL DESCRIPTION The Austin Semiconductor, Inc. AS4C4M4DG is a 4,194,304 x 4 bit Fast Page Mode CMOS DRAM offering high speed random access of memory cells within the same row. This device features a +5V (±10) power supply, refresh cycle (2K), and fast access times (60 and 70ns). FEATURES •

文件：2.61017 Mbytes 页数：19 Pages

AUSTIN

4M x 4 CMOS DRAM WITH FAST PAGE MODE, 3.3V

GENERAL DESCRIPTION The Austin Semiconductor, Inc. AS4C4M4DG is a 4,194,304 x 4 bit Fast Page Mode CMOS DRAM offering high speed random access of memory cells within the same row. This device features a +5V (±10) power supply, refresh cycle (2K), and fast access times (60 and 70ns). FEATURES •

文件：2.61017 Mbytes 页数：19 Pages

AUSTIN

4M x 4 CMOS DRAM WITH FAST PAGE MODE, 3.3V

GENERAL DESCRIPTION The Austin Semiconductor, Inc. AS4C4M4DG is a 4,194,304 x 4 bit Fast Page Mode CMOS DRAM offering high speed random access of memory cells within the same row. This device features a +5V (±10%) power supply, refresh cycle (2K), and fast access times (60 and 70ns). FEATUR

文件：2.61017 Mbytes 页数：19 Pages

AUSTIN