DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M54HC112 is an high speed CMOS DUAL J-K FLIP-FLOP WITH PRESET AND CLEAR fabricated with silicon gate C2MOS technology. The M54HC112 dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs for each flip-flop. When the clock goes high, the inputs ar

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DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M54HC112 is an high speed CMOS DUAL J-K FLIP-FLOP WITH PRESET AND CLEAR fabricated with silicon gate C2MOS technology. The M54HC112 dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs for each flip-flop. When the clock goes high, the inputs ar

文件：251.25 Kbytes 页数：11 Pages

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DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M54HC112 is an high speed CMOS DUAL J-K FLIP-FLOP WITH PRESET AND CLEAR fabricated with silicon gate C2MOS technology. The M54HC112 dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs for each flip-flop. When the clock goes high, the inputs ar

文件：251.25 Kbytes 页数：11 Pages

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DUAL J-K FLIP FLOP WITH PRESET

DESCRIPTION The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■

文件：247.82 Kbytes 页数：11 Pages

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DUAL J-K FLIP FLOP WITH PRESET

DESCRIPTION The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■

文件：247.82 Kbytes 页数：11 Pages

STMICROELECTRONICS

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DUAL J-K FLIP FLOP WITH PRESET

DESCRIPTION The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■

文件：247.82 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET

DESCRIPTION The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■

文件：247.82 Kbytes 页数：11 Pages

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TRIPLE 3-INPUT AND GATE

DESCRIPTION The M74HC11 is an high speed CMOS TRIPLE 3-INPUT AND GATE fabricated with silicon gate C2MOS technology. ■ HIGH SPEED: tPD = 9ns (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■ SYMMETR

文件：177.82 Kbytes 页数：8 Pages

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TRIPLE 3-INPUT AND GATE

Description The M54HCxxx and M54HCTxxx series are composed of over 90 types of high speed CMOS functions specifically designed to meet the radiation requirements of the aerospace industry. It includes a large set of gates, Flip-Flops, Multiplexers, Counters, Bus interface and several other functi

文件：233.71 Kbytes 页数：9 Pages

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TRIPLE 3-INPUT AND GATE

Description The M54HCxxx and M54HCTxxx series are composed of over 90 types of high speed CMOS functions specifically designed to meet the radiation requirements of the aerospace industry. It includes a large set of gates, Flip-Flops, Multiplexers, Counters, Bus interface and several other functi

文件：233.71 Kbytes 页数：9 Pages

STMICROELECTRONICS

意法半导体