DUAL J-K FLIP FLOP WITH PRESET

DESCRIPTION The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■

文件：247.82 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET

DESCRIPTION The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■

文件：247.82 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET

DESCRIPTION The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■

文件：247.82 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

DUAL J-K FLIP FLOP WITH PRESET

DESCRIPTION The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■

文件：247.82 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体