Dual 4-input multiplexer

1. General description The 74HC153; 74HCT153 is a dual 4-input multiplexer. The device features independent enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer output (nY). A

文件：248.46 Kbytes 页数：14 Pages

NEXPERIA

安世

Dual 4-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT153 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT153 have two identical 4-input multiplexers which select two bits of data from up to fo

文件：46.32 Kbytes 页数：7 Pages

PHI

PHI

Dual 4-input multiplexer

1. General description The 74HC153-Q100; 74HCT153-Q100 is a dual 4-input multiplexer. The device features independent enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer outpu

文件：247.44 Kbytes 页数：14 Pages

NEXPERIA

安世

Dual 4-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT153 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT153 have two identical 4-input multiplexers which select two bits of data from up to fo

文件：46.32 Kbytes 页数：7 Pages

PHI

PHI

Dual 4-input multiplexer

1. General description The 74HC153; 74HCT153 is a dual 4-input multiplexer. The device features independent enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer output (nY). A

文件：248.46 Kbytes 页数：14 Pages

NEXPERIA

安世

Dual 4-input multiplexer

1. General description The 74HC153-Q100; 74HCT153-Q100 is a dual 4-input multiplexer. The device features independent enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer outpu

文件：247.44 Kbytes 页数：14 Pages

NEXPERIA

安世

Dual 4-input multiplexer

1. General description The 74HC153-Q100; 74HCT153-Q100 is a dual 4-input multiplexer. The device features independent enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer outpu

文件：247.44 Kbytes 页数：14 Pages

NEXPERIA

安世

4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

文件：59.41 Kbytes 页数：7 Pages

PHI

PHI

4-to-16 line decoder/demultiplexer

1. General description The 74HC154; 74HCT154 is a 4-to-16 line decoder/demultiplexer. It decodes four binary weighted address inputs (A0 to A3) to sixteen mutually exclusive outputs (Y0 to Y15). The device features two input enable (E0 and E1) inputs. A HIGH on either of the input enables force

文件：294.64 Kbytes 页数：17 Pages

NEXPERIA

安世

4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

文件：144.3 Kbytes 页数：22 Pages

PHI

PHI