Quad 2-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT157 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • Output capability: standard • ICC category: MSI

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PHI

PHI

Quad 2-input multiplexer

1. General description The 74HC157-Q100; 74HCT157-Q100 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use

文件：261.64 Kbytes 页数：15 Pages

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Quad 2?묲nput Data Selectors / Multiplexers High?뭁erformance Silicon?묰ate CMOS

The 74HCT157 is identical in pinout to the LS157. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device routes 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the

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ONSEMI

安森美半导体

Quad 2?묲nput Data Selectors / Multiplexers High?뭁erformance Silicon?묰ate CMOS

The 74HCT157 is identical in pinout to the LS157. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device routes 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the

文件：138.65 Kbytes 页数：9 Pages

ONSEMI

安森美半导体

Quad 2-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT157 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • Output capability: standard • ICC category: MSI

文件：44.04 Kbytes 页数：7 Pages

PHI

PHI

Quad 2-input multiplexer

1. General description The 74HC157; 74HCT157 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use of current

文件：262.12 Kbytes 页数：15 Pages

NEXPERIA

安世

Quad 2-input multiplexer

1. General description The 74HC157-Q100; 74HCT157-Q100 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use

文件：261.64 Kbytes 页数：15 Pages

NEXPERIA

安世

Quad 2-input multiplexer

1. General description The 74HC157-Q100; 74HCT157-Q100 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use

文件：261.64 Kbytes 页数：15 Pages

NEXPERIA

安世

Quad 2-input multiplexer; inverting

GENERAL DESCRIPTION The 74HC/HCT158 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inverting data path • Output capability: standard • ICC category: MSI

文件：44.34 Kbytes 页数：7 Pages

PHI

PHI

丝印：74HCT240D；Package：SOIC20；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Octal Bus Buffer 74HCT240D: INVERTED, 3-STATE OUTPUTS 74HCT244D: NON-INVERTED, 3-STATE OUTPUTS General The 74HCT240D, and 74HCT244D are high speed CMOS OCTAL BUS BUFFERs fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar t

文件：228.12 Kbytes 页数：8 Pages

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