Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

文件：271.41 Kbytes 页数：17 Pages

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安世

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

文件：120.59 Kbytes 页数：23 Pages

PHI

PHI

丝印：74HCT14D；Package：SOIC14；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Hex Schmitt Inverter General The 74HCT14D is a high speed CMOS SCHMITT INVERTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. This device may be used

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TOSHIBA

东芝

Hex inverting Schmitt trigger

1. General description The 74HC14; 74HCT14 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to vol

文件：268.5 Kbytes 页数：16 Pages

NEXPERIA

安世

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

文件：120.59 Kbytes 页数：23 Pages

PHI

PHI

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

文件：271.42 Kbytes 页数：17 Pages

NEXPERIA

安世

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

文件：271.41 Kbytes 页数：17 Pages

NEXPERIA

安世

Hex Schmitt?뭈rigger Inverter with LSTTL Compatible Inputs High?뭁erformance Silicon?묰ate CMOS

Hex Schmitt−Trigger Inverter with LSTTL Compatible Inputs High−Performance Silicon−Gate CMOS The 74HCT14 may be used as a level converter for interfacing TTL or NMOS outputs to high−speed CMOS inputs. The HCT14 is useful to “square up” slow input rise and fall times. Due to the hysteresis volta

文件：130.25 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Hex Schmitt?뭈rigger Inverter with LSTTL Compatible Inputs High?뭁erformance Silicon?묰ate CMOS

Hex Schmitt−Trigger Inverter with LSTTL Compatible Inputs High−Performance Silicon−Gate CMOS The 74HCT14 may be used as a level converter for interfacing TTL or NMOS outputs to high−speed CMOS inputs. The HCT14 is useful to “square up” slow input rise and fall times. Due to the hysteresis volta

文件：130.25 Kbytes 页数：8 Pages

ONSEMI

安森美半导体

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

文件：120.59 Kbytes 页数：23 Pages

PHI

PHI