3-to-8 line decoder, demultiplexer with address latches inverting

文件：107.6 Kbytes 页数：19 Pages

PHI

飞利浦

3-to-8 line decoder, demultiplexer with address latches inverting

文件：107.6 Kbytes 页数：19 Pages

PHI

飞利浦

3-to-8 line decoder, demultiplexer with address latches; inverting

The 74HC137 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC137 is specified in compliance with JEDEC standard no. 7A.\n The 74HC137 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC137 essentiall • Combines 3-to-8 decoder with 3-bit latch\n• Multiple input enable for easy expansion or independent controls\n• Active LOW mutually exclusive outputs\n• Low-power dissipation\n• Complies with JEDEC standard no. 7A\n• ESD protection:• HBM EIA/JESD22-A114-B exceeds 2000 V\n• MM EIA/JESD22-A115-A exc;

Nexperia

安世

3-to-8 line decoder, demultiplexer with address latches; inverting

The 74HC137 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC137 is specified in compliance with JEDEC standard no. 7A.\n The 74HC137 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC137 essentiall • Combines 3-to-8 decoder with 3-bit latch\n• Multiple input enable for easy expansion or independent controls\n• Active LOW mutually exclusive outputs\n• Low-power dissipation\n• Complies with JEDEC standard no. 7A\n• ESD protection:• HBM EIA/JESD22-A114-B exceeds 2000 V\n• MM EIA/JESD22-A115-A exc;

Nexperia

安世

3-to-8 line decoder, demultiplexer with address latches; inverting

The 74HC137 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features a latch enable (LE) and two output enable (E1, E2) inputs. A LOW on LE causes the device to act as an active LOW decoder. A LOW-to HIGH transition on LE stores • Combines 3-to-8 decoder with 3-bit latch\n• Multiple input enable for easy expansion or independent controls\n• Active LOW mutually exclusive outputs\n• Wide supply voltage range from 2.0 to 6.0 V\n• CMOS low power dissipation\n• High noise immunity\n• Latch-up performance exceeds 100 mA per JESD ;

Nexperia

安世

Package：16-SOIC（0.154"，3.90mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER/DEMUX 1 X 3:8 16SO

Nexperia USA Inc.

Package：16-SSOP（0.209"，5.30mm 宽）；包装：托盘 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER/DEMUX 1X3:8 16SSOP

Nexperia USA Inc.

Package：16-SSOP（0.209"，5.30mm 宽）；包装：托盘 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC DECODER/DEMUX 1X3:8 16SSOP

Nexperia USA Inc.