3-to-8 line decoder, demultiplexer with address latches inverting

文件：107.6 Kbytes 页数：19 Pages

PHI

PHI

High Speed CMOS Logic, 3-to-8 Line Decoder Demultiplexer with Address Latches

文件：65.099 Kbytes 页数：10 Pages

TI

德州仪器

High Speed CMOS Logic, 3-to-8 Line Decoder Demultiplexer with Address Latches

文件：65.099 Kbytes 页数：10 Pages

TI

德州仪器

3 TO 8 LINE DECODER/LATCH INVERTING

DESCRIPTION TheM54/74HC137 is ahigh speed CMOS3TO8LINE DECODER/LATCH (INVERTING) fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 11 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC

文件：256.38 Kbytes 页数：11 Pages

STMICROELECTRONICS

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