24-Bit Digital Signal Processor

DSP56321T Features High-Performance DSP56300 Core • 220/240 million multiply-accumulates per second (MMACS) (440/480 MMACS using the EFCOP in filtering applications) with a 220/240 MHz clock at 1.6 V core and 3.3 V I/O and a junction temperature range of 0–85°C • Object code compatible with t

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恩XP

24-Bit Digital Signal Processor

Features • 80/100 million instructions per second (MIPS) with a 80/100 MHz clock at 3.0–3.6 V • Object code compatible with the DSP56000 core with highly parallel instruction set • Data Arithmetic Logic Unit (Data ALU) with fully pipelined 24 × 24-bit parallel Multiplier- Accumulator (MAC), 56

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恩XP

The DSP56371 is a high density CMOS device with 5.0-V compatible inputs and outputs

DSP56300 Core Description The DSP56371 uses the DSP56300 core, a high-performance, single clock cycle per instruction engine that provides up to twice the performance of Motorola's popular DSP56000 core family while retaining code compatibility with it. The DSP56300 core family offers a new le

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恩XP

24-Bit Audio Digital Signal Processor

Overview This document briefly describes the DSP56367 24-bit digital signal processor (DSP). The DSP56367 is a member of the DSP56300 family of programmable CMOS DSPs. The DSP56367 is targeted to applications that require digital audio compression/decompression, sound field processing, acoustic e

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freescaleFreescale Semiconductor, Inc

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Implementing Viterbi Decoders Using the VSL Instruction on DSP Families

24-Bit Digital Signal Processor The DSP56309 is a member of the DSP56300 core family of programmable CMOS DSPs. The DSP56300 core includes a barrel shifter, 24-bit addressing, an instruction cache, and direct memory access (DMA). The DSP56309 offers 100 MMACS at 3.0–3.6 V using an inter

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freescaleFreescale Semiconductor, Inc

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24-Bit Audio Digital Signal Processor

Overview The DSP56366 supports digital audio applications requiring sound field processing, acoustic equalization, and other digital audio algorithms. The DSP56366 uses the high performance, single-clock-per-cycle DSP56300 core family of programmable CMOS digital signal processors (DSPs) combined

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freescaleFreescale Semiconductor, Inc

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24-Bit Audio Digital Signal Processor

Overview This document briefly describes the DSP56367 24-bit digital signal processor (DSP). The DSP56367 is a member of the DSP56300 family of programmable CMOS DSPs. The DSP56367 is targeted to applications that require digital audio compression/decompression, sound field processing, acoustic e

文件：1.07998 Mbytes 页数：100 Pages

freescaleFreescale Semiconductor, Inc

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24-Bit Audio Digital Signal Processor

Overview The DSP56364 supports digital audio applications requiring sound field processing, acoustic equalization, and other digital audio algorithms. Features Digital Signal Processing Core • 100 Million Instructions Per Second (MIPS) with an 100 MHz clock at 3.3V. • Object Code Compatible w

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freescaleFreescale Semiconductor, Inc

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24-Bit Audio Digital Signal Processor

Overview Freescale Semiconductor, Inc. designed the DSP56362 to support digital audio applications requiring digital audio compression and decompression, sound field processing, acoustic equalization, and other digital audio algorithms. The DSP56362 usesthe high performance, single-clock-per

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freescaleFreescale Semiconductor, Inc

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high density CMOS device with 3.3 V inputs and outputs

Overview The DSP56374 is a high density CMOS device with 3.3 V inputs and outputs. The DSP56374 supports digital audio applications requiring sound field processing, acoustic equalization, and other digital audio algorithms. The DSP56374 uses the high performance, single-clock-per-cycle DSP5

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Motorola

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