24-BIT DIGITAL SIGNAL PROCESSOR

FEATURES • Efficient 24-bit DSP56000 core • Up to 40 Million Instructions Per Second (MIPS), 25 ns instruction cycle at 80 MHz; up to 33 MIPS, 30.3 ns instruction cycle at 66 MHz • Up to 240 Million Operations Per Second (MOPS) at 80 MHz; up to 198 MOPS at 66 MHz • Performs a 1024-point comp

文件：1.14981 Mbytes 页数：110 Pages

恩XP

24-BIT DIGITAL SIGNAL PROCESSOR

FEATURES • Efficient 24-bit DSP56000 core • Up to 40 Million Instructions Per Second (MIPS), 25 ns instruction cycle at 80 MHz; up to 33 MIPS, 30.3 ns instruction cycle at 66 MHz • Up to 240 Million Operations Per Second (MOPS) at 80 MHz; up to 198 MOPS at 66 MHz • Performs a 1024-point comp

文件：1.14981 Mbytes 页数：110 Pages

恩XP

24-BIT DIGITAL SIGNAL PROCESSOR

The DSP56002 and the DSP56L002 are MPU-style general purpose Digital Signal Processors (DSPs), composed of an efficient 24-bit digital signal processor core, program and data memories, various peripherals, and support circuitry. DSP56002/L002 Features Digital Signal Processing Core • Efficient,

文件：716.05 Kbytes 页数：110 Pages

Motorola

摩托罗拉

24-BIT DIGITAL SIGNAL PROCESSOR

FEATURES • Efficient 24-bit DSP56000 core • Up to 40 Million Instructions Per Second (MIPS), 25 ns instruction cycle at 80 MHz; up to 33 MIPS, 30.3 ns instruction cycle at 66 MHz • Up to 240 Million Operations Per Second (MOPS) at 80 MHz; up to 198 MOPS at 66 MHz • Performs a 1024-point comp

文件：1.14981 Mbytes 页数：110 Pages

恩XP

24-BIT DIGITAL SIGNAL PROCESSOR

FEATURES • Efficient 24-bit DSP56000 core • Up to 40 Million Instructions Per Second (MIPS), 25 ns instruction cycle at 80 MHz; up to 33 MIPS, 30.3 ns instruction cycle at 66 MHz • Up to 240 Million Operations Per Second (MOPS) at 80 MHz; up to 198 MOPS at 66 MHz • Performs a 1024-point comp

文件：1.14981 Mbytes 页数：110 Pages

恩XP

SYMPHONY™AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS

FEATURES Digital Signal Processing Core • Efficient, object code compatible with the 24-bit DSP56000 core engine • Up to 40.5 Million Instructions Per Second (MIPS)—24.7 ns instruction cycle at 81 MHz; up to 324 Million Operations Per Second (MOPS) at 81 MHz • Highly parallel instruction set

文件：909.28 Kbytes 页数：82 Pages

恩XP

SYMPHONY AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS

SYMPHONY™ AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS Motorola designed the Symphony™ family of high-performance, programmable Digital Signal Processors (DSPs) to support a variety of digital audio applications, including Dolby ProLogic, ATRAC, and Lucasfilm Home THX processing.

文件：617.03 Kbytes 页数：82 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

SYMPHONY AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS

SYMPHONY™ AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS Motorola designed the Symphony™ family of high-performance, programmable Digital Signal Processors (DSPs) to support a variety of digital audio applications, including Dolby ProLogic, ATRAC, and Lucasfilm Home THX processing.

文件：617.03 Kbytes 页数：82 Pages

freescaleFreescale Semiconductor, Inc

飞思卡尔飞思卡尔半导体

SYMPHONY™AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS

FEATURES Digital Signal Processing Core • Efficient, object code compatible with the 24-bit DSP56000 core engine • Up to 40.5 Million Instructions Per Second (MIPS)—24.7 ns instruction cycle at 81 MHz; up to 324 Million Operations Per Second (MOPS) at 81 MHz • Highly parallel instruction set

文件：909.28 Kbytes 页数：82 Pages

恩XP

SYMPHONY™AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS

FEATURES Digital Signal Processing Core • Efficient, object code compatible with the 24-bit DSP56000 core engine • Up to 40.5 Million Instructions Per Second (MIPS)—24.7 ns instruction cycle at 81 MHz; up to 324 Million Operations Per Second (MOPS) at 81 MHz • Highly parallel instruction set

文件：909.28 Kbytes 页数：82 Pages

恩XP