Small Signal Transistors PNP - High Voltage Transistor Chip

PROCESS DETAILS Process EPITAXIAL PLANAR Die Size 19.7 x 19.7 MILS Die Thickness 7.1 MILS Base Bonding Pad Area 4.0 x 4.0 MILS Emitter Bonding Pad Area 4.7 x 4.7 MILS Top Side Metalization Al - 30,000Å Back Side Metalization Au - 18,000Å

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Small Signal Transistor PNP - High Current Transistor Chip

PROCESS DETAILS Process EPITAXIAL PLANAR Die Size 22 x 22 MILS Die Thickness 9.0 MILS Base Bonding Pad Area 5.7 X 4.0 MILS Emitter Bonding Pad Area 5.3 X 4.0 MILS Top Side Metalization Al - 30,000Å Back Side Metalization Au - 18,000Å

文件：216.13 Kbytes 页数：2 Pages

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Small Signal MOSFET Transistor P-Channel Enhancement-Mode Transistor Chip

PROCESS DETAILS Die Size 27.6 x 31.5 MILS Die Thickness 5.5 MILS Gate Bonding Pad Area 3.9 x 3.9 MILS Source Bonding Pad Area 20.2 x 24.1 MILS Top Side Metalization Ai-Si - 35,000Å Back Side Metalization Au - 12,000Å

文件：468.51 Kbytes 页数：2 Pages

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Small Signal Transistors NPN - Amp Switch Transistor Chip

PROCESS DETAILS Process EPITAXIAL PLANAR Die Size 19.7 x 19.7 MILS Die Thickness 7.1 MILS Base Bonding Pad Area 4.0 x 4.0 MILS Emitter Bonding Pad Area 4.7 x 4.7 MILS Top Side Metalization Al - 30,000Å Back Side Metalization Au - 18,000Å

文件：38.43 Kbytes 页数：1 Pages

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Small Signal Transistors PNP - High Voltage Transistor Chip

PROCESS DETAILS Process EPITAXIAL PLANAR Die Size 17.3 x 17.3 MILS Die Thickness 7.1 MILS Base Bonding Pad Area 3.9 x 3.9 MILS Emitter Bonding Pad Area 3.9 x 3.9 MILS Top Side Metalization Al-Si - 30,000Å Back Side Metalization Au - 12,000Å

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The CP736V-2N5401 die is a PNP silicon transistor designed for high voltage amplifi er applications.

The CP736V-2N5401 die is a PNP silicon transistor designed for high voltage amplifi er applications. MECHANICAL SPECIFICATIONS: Die Size 17.3 x 17.3 MILS Die Thickness 7.1 MILS Base Bonding Pad Size 3.9 x 3.9 MILS Emitter Bonding Pad Size 3.9 x 3.9 MILS Top Side Metalization A

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Small Signal Transistors PNP - Low VCE(SAT) Transistor Chip

PROCESS DETAILS Process EPITAXIAL PLANAR Die Size 17.7 x 17.7 MILS Die Thickness 7.1 MILS Base Bonding Pad Area 3.8 x 3.8 MILS Emitter Bonding Pad Area 3.8 x 3.8 MILS Top Side Metalization Al-Si - 30,000Å Back Side Metalization Au - 12,000Å

文件：42.81 Kbytes 页数：1 Pages

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Small Signal Transistors PNP - High Current Transistor Chip

PROCESS DETAILS Process EPITAXIAL PLANAR Die Size 66 x 66 MILS Die Thickness 7.1 MILS Base Bonding Pad Area 7.9 x 7.9 MILS Emitter 1 Bonding Pad Area 7.9 x 9.5 MILS Emitter 2 Bonding Pad Area 7.9 x 9.5 MILS Top Side Metalization Al-Si - 30,000Å Back Side Metalizatio

文件：71.22 Kbytes 页数：1 Pages

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Small Signal MOSFET Transistor P-Channel Enhancement-Mode MOSFET Chip

PROCESS DETAILS Die Size 22 x 17 MILS Die Thickness 5.9 MILS Gate Bonding Pad Area 3.9 x 3.9 MILS Source Bonding Pad Area 14 x 9 MILS Top Side Metalization Al-Si - 30,000Å Back Side Metalization Au - 12,000Å

文件：744.66 Kbytes 页数：2 Pages

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Power Transistor PNP - High Current Transistor Chip

PROCESS DETAILS ​​​​​​​ Die Size 48.8 x 48.8 MILS Die Thickness 7.1 MILS Base Bonding Pad Area 7.9 x 7.9 MILS Emitter Bonding Pad Area 9.1 x 18.1 MILS Top Side Metalization Al - 30,000Å Back Side Metalization Ti/Ni/Ag - 2,000Å/3,000Å/20,000Å

文件：667.54 Kbytes 页数：2 Pages

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