Integer-N Clock Translator for Wireline Communications

GENERAL DESCRIPTION The AD9550 is a phase-locked loop (PLL) based clock translator designed to address the needs of wireline communication and base station applications. The device employs an integer-N PLL to accommodate the applicable frequency translation requirements. It accepts a single-ended

文件：406.17 Kbytes 页数：20 Pages

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亚德诺

包装：盒 功能：时钟缓冲器/驱动器/接收器/转换器 类别：开发板，套件，编程器 评估和演示板及套件 描述：BOARD EVALUATION FOR AD9550

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Integer-N Clock Translator for Wireline Communications

GENERAL DESCRIPTION The AD9550 is a phase-locked loop (PLL) based clock translator designed to address the needs of wireline communication and base station applications. The device employs an integer-N PLL to accommodate the applicable frequency translation requirements. It accepts a single-ended

文件：406.17 Kbytes 页数：20 Pages

AD

亚德诺

Integer-N Clock Translator for Wireline Communications

GENERAL DESCRIPTION The AD9550 is a phase-locked loop (PLL) based clock translator designed to address the needs of wireline communication and base station applications. The device employs an integer-N PLL to accommodate the applicable frequency translation requirements. It accepts a single-ended

文件：406.17 Kbytes 页数：20 Pages

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7.5mm pitch pluggable rising clamp terminal blocks

Product ove r v i ew • 2-12 pole solid block • Professional rising clamp terminals • Moulded in green UL94-V0 flame retardant PA66 • Cable acceptance - 0.32 to 1.6mm2 (28-14AWG) solid and stranded cable • Pluggable male and female connectors • Open and closed headers • Horizontal female pl

文件：761.21 Kbytes 页数：2 Pages

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