Multiservice Clock Generator

GENERAL DESCRIPTION The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended

文件：799.08 Kbytes 页数：40 Pages

AD

亚德诺

Multiservice Clock Generator

GENERAL DESCRIPTION The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended

文件：799.08 Kbytes 页数：40 Pages

AD

亚德诺

Package：40-VFQFN 裸露焊盘，CSP；包装：卷带（TR） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLOCK GEN TRANSLATOR 40LFCSP

AD

亚德诺

Multiservice Clock Generator

GENERAL DESCRIPTION The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended

文件：799.08 Kbytes 页数：40 Pages

AD

亚德诺

Programmable Communications Interface

DISTINCTIVE CHARACTERISTICS • Improved performance with Am9551 • Separate control and transmit register input buffers • 8080A/9080A compatible • Synchronous or asynchronous serial data transfer • Parity, overrun and framing errors detected • Half or full duplex signalling • Character length

文件：438.42 Kbytes 页数：7 Pages

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56 V/12 A Smart Motor Module

General Description The AOZ9551QV is an integrated half-bridge gate driver with smart functions. The device includes one half-bridge gate driver, capable of driving high-side and low-side N-channel MOSFETs. Using two AOZ9551QV for single phase motor drivers and three AOZ9551QV for three phase

文件：787.61 Kbytes 页数：11 Pages

AOSMD

万国半导体