Multiservice Clock Generator

GENERAL DESCRIPTION The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended

文件：799.08 Kbytes 页数：40 Pages

AD

亚德诺

Programmable Communications Interface

DISTINCTIVE CHARACTERISTICS • Improved performance with Am9551 • Separate control and transmit register input buffers • 8080A/9080A compatible • Synchronous or asynchronous serial data transfer • Parity, overrun and framing errors detected • Half or full duplex signalling • Character length

文件：438.42 Kbytes 页数：7 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

56 V/12 A Smart Motor Module

General Description The AOZ9551QV is an integrated half-bridge gate driver with smart functions. The device includes one half-bridge gate driver, capable of driving high-side and low-side N-channel MOSFETs. Using two AOZ9551QV for single phase motor drivers and three AOZ9551QV for three phase

文件：787.61 Kbytes 页数：11 Pages

AOSMD

万国半导体

Rack PDU, Basic, Zero U, 20A, 120V, (14)5-15

文件：39.32 Kbytes 页数：1 Pages

etc2List of Unclassifed Manufacturers

etc未分类制造商etc2未分类制造商