Clock Generator with Dual PLLs

GENERAL DESCRIPTION The AD9577 provides a multioutput clock generator function, along with two on-chip phase-locked loop cores, PLL1 and PLL2, optimized for network clocking applications. The PLL designs are based on the Analog Devices, Inc., proven portfolio of high performance, low jitter frequ

文件：672.93 Kbytes 页数：44 Pages

AD

亚德诺

Clock Generator with Dual PLLs, Spread Spectrum, and Margining

文件：746.39 Kbytes 页数：44 Pages

AD

亚德诺

Package：40-WFQFN 裸露焊盘，CSP；包装：托盘 类别：集成电路（IC） 应用特定时钟/定时 描述：IC CLK GEN PLL DUAL 40LFCSP

AD

亚德诺

Clock Generator with Dual PLLs

GENERAL DESCRIPTION The AD9577 provides a multioutput clock generator function, along with two on-chip phase-locked loop cores, PLL1 and PLL2, optimized for network clocking applications. The PLL designs are based on the Analog Devices, Inc., proven portfolio of high performance, low jitter frequ

文件：672.93 Kbytes 页数：44 Pages

AD

亚德诺

N-CHANNEL ENHANCEMENT MODE POWER MOSFET

文件：101.3 Kbytes 页数：4 Pages

A-POWER

富鼎先进电子

Socket 370 SBC with Gigabit LAN, USB2.0, VGA/LCD and Audio

[Advantech] Features • Socket 370 supports up to Pentium® III/512K 1.26GHz • Supports Gigabit Ethernet (PCM-9577FG) • Supports Embedded USB, 4 USB 2.0 ports (PCM-9577FG) • 133MHz FSB and 4X AGP graphics for high performance application • Supports 24/36 bit TFT/DSTN LCD and 2-channel LVDS i

文件：263.14 Kbytes 页数：2 Pages

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