Single D-type flip-flop with set and reset; positive edge trigger

DESCRIPTION The 74LVC1G74 is a high-performance, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and (RD) inputs, and comp

文件：112.64 Kbytes 页数：19 Pages

PHI

PHI

Single D-type flip-flop with set and reset; positive edge trigger

DESCRIPTION The 74LVC1G74 is a high-performance, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and (RD) inputs, and comp

文件：112.64 Kbytes 页数：19 Pages

PHI

PHI

Single D-type flip-flop with set and reset; positive edge trigger

General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs. This device is fully specified for partial power-down applications using IOFF.

文件：103.94 Kbytes 页数：19 Pages

恩XP

丝印：V74；Package：SOT505-2；Single D-type flip-flop with set and reset; positive edge trigger

1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transi

文件：290.66 Kbytes 页数：19 Pages

NEXPERIA

安世

丝印：Y4；Package：SOT1089；Single D-type flip-flop with set and reset; positive edge trigger

1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transi

文件：290.66 Kbytes 页数：19 Pages

NEXPERIA

安世

Single D-type flip-flop with set and reset; positive edge trigger

General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs. This device is fully specified for partial power-down applications using IOFF.

文件：103.94 Kbytes 页数：19 Pages

恩XP

丝印：Y4；Package：SOT1116；Single D-type flip-flop with set and reset; positive edge trigger

1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transi

文件：290.66 Kbytes 页数：19 Pages

NEXPERIA

安世

丝印：Y4；Package：SOT1203；Single D-type flip-flop with set and reset; positive edge trigger

1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transi

文件：290.66 Kbytes 页数：19 Pages

NEXPERIA

安世

丝印：V74；Package：SOT833-1；Single D-type flip-flop with set and reset; positive edge trigger

1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transi

文件：290.66 Kbytes 页数：19 Pages

NEXPERIA

安世

Single D-type flip-flop with set and reset; positive edge trigger

General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs. This device is fully specified for partial power-down applications using IOFF.

文件：103.94 Kbytes 页数：19 Pages

恩XP