Single D-type flip-flop with set and reset; positive edge trigger

DESCRIPTION The 74LVC1G74 is a high-performance, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and (RD) inputs, and comp

文件：112.64 Kbytes 页数：19 Pages

PHI

PHI

Single D-type flip-flop with set and reset; positive edge trigger

General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs. This device is fully specified for partial power-down applications using IOFF.

文件：103.94 Kbytes 页数：19 Pages

恩XP

Single D-type flip-flop with set and reset; positive edge trigger

1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transi

文件：290.66 Kbytes 页数：19 Pages

NEXPERIA

安世

Single D-type flip-flop with set and reset; positive edge trigger

文件：202.57 Kbytes 页数：25 Pages

恩XP

Single D-type flip-flop with set and reset; positive edge trigger

文件：166.02 Kbytes 页数：25 Pages

PHI

PHI

Single D-type flip-flop with set and reset; positive edge trigger

文件：549.89 Kbytes 页数：21 Pages

恩XP

Single D-type flip-flop with set and reset; positive edge trigger

文件：549.89 Kbytes 页数：21 Pages

恩XP

Single D-Type Positive Edge-Triggered Flip-Flop with Clear and Preset

The 74LVC1G74 is a single D-Type positive edge-triggered flip-flop with clear and preset functions. This device can operate in the supply voltage range from 1.65V to 5.5V. No matter what the levels of the other inputs are, the preset (PRE) input or clear (CLR) input can be pulled low to set or reset • Wide Supply Voltage Range: 1.65V to 5.5V\n\n• Inputs Accept Voltages Higher than the Supply Voltage\n\n• +32mA/-32mA Output Current\n\n• Outputs in High-Impedance State when VCC = 0V\n\n• -40℃ to +125℃ Operating Temperature Range\n\n• Available in Green VSSOP-8 and XTDFN-1.4×1-8L Packages;

SGMICRO

圣邦股份

Single D-type flip-flop with set and reset; positive edge trigger

General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs. This device is fully specified for partial power-down applications using IOFF.

文件：103.94 Kbytes 页数：19 Pages

恩XP

丝印：V74；Package：SOT765-1；Single D-type flip-flop with set and reset; positive edge trigger

1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transi

文件：290.66 Kbytes 页数：19 Pages

NEXPERIA

安世