Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT123 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long

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飞利浦

Dual retriggerable monostable multivibrator with reset

General description The 74HC123; 74HCT123 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC123; 74HCT123 are dual retriggerable monostable multivibrators with output pulse width co

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Dual retriggerable monostable multivibrator with reset

1. General description The 74HC123; 74HCT123 is a dual retriggerable monostable multivibrator with reset. The basic output pulse width is programmed by selection of external components (REXT and CEXT). Once triggered this basic pulse width may be extended by retriggering either of the edge trig

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安世

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT123 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long

文件：295.88 Kbytes 页数：25 Pages

PHI

飞利浦

Dual retriggerable monostable multivibrator with reset

General description The 74HC123; 74HCT123 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC123; 74HCT123 are dual retriggerable monostable multivibrators with output pulse width co

文件：155.34 Kbytes 页数：24 Pages

恩XP

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT123 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long

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PHI

飞利浦

Dual retriggerable monostable multivibrator with reset

1. General description The 74HC123-Q100; 74HCT123-Q100 is a dual retriggerable monostable multivibrator with reset. The basic output pulse width is programmed by selection of external components (REXT and CEXT). Once triggered this basic pulse width may be extended by retriggering either of the

文件：315.15 Kbytes 页数：20 Pages

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安世

Dual retriggerable monostable multivibrator with reset

1. General description The 74HC123-Q100; 74HCT123-Q100 is a dual retriggerable monostable multivibrator with reset. The basic output pulse width is programmed by selection of external components (REXT and CEXT). Once triggered this basic pulse width may be extended by retriggering either of the

文件：315.15 Kbytes 页数：20 Pages

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安世

Quad 3?뭆tate Noninverting Buffers

The 74HC125 is identical in pinout to the LS125. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125 noninverting buffer is designed to be used with 3−state memory address drivers, clock drivers, and other bus−orien

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ONSEMI

安森美半导体

Quad 3?뭆tate Noninverting Buffers

Quad 3−State Noninverting Buffers High−Performance Silicon−Gate CMOS The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A n

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安森美半导体