PNP/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k

Features and benefits  100 mA output current capability  Built-in bias resistors  Simplifies circuit design  Reduces component count  Reduces pick and place costs  AEC-Q101 qualified

文件：920.08 Kbytes 页数：15 Pages

NEXPERIA

安世

PNP/PNP resistor-equipped transistors; R1 = 2.2 k, R2 = 47 k

Features and benefits  100 mA output current capability  Built-in bias resistors  Simplifies circuit design  Reduces component count  Reduces pick and place costs  AEC-Q101 qualified

文件：917.23 Kbytes 页数：16 Pages

NEXPERIA

安世

NPN/PNP resistor-equipped transistors; R1 = 2.2 kohm, R2 = 47 kohm

DESCRIPTION NPN/PNP resistor-equipped transistors in a SOT666 plastic package. FEATURES • 300 mW total power dissipation • Very small 1.6 × 1.2 mm ultra thin package • Excellent coplanarity due to straight leads • Replaces two SC-75/SC-89 packaged transistors on same PCB area • Reduces requ

文件：47.67 Kbytes 页数：8 Pages

PHI

PHI

NPN/PNP resistor-equipped transistors; R1 = 2.2 k廓, R2 = 47 k廓

General description NPN/PNP Resistor-Equipped Transistors (RET) in Surface-Mounted Device (SMD) plastic packages. Features and benefits ■ 100 mA output current capability ■ Reduces component count ■ Built-in bias resistors ■ Reduces pick and place costs ■ Simplifies circuit design ■ AEC

文件：149.75 Kbytes 页数：9 Pages

恩XP

丝印：D1；Package：SOT666；NPN/PNP resistor-equipped transistors; R1 = 2.2 k, R2 = 47 k

Features and benefits  100 mA output current capability  Built-in bias resistors  Simplifies circuit design  Reduces component count  Reduces pick and place costs  AEC-Q101 qualified

文件：1.06562 Mbytes 页数：17 Pages

NEXPERIA

安世

NPN/PNP resistor-equipped transistors; R1 = 2.2 k, R2 = 47 k

Features and benefits  100 mA output current capability  Built-in bias resistors  Simplifies circuit design  Reduces component count  Reduces pick and place costs  AEC-Q101 qualified

文件：1.06562 Mbytes 页数：17 Pages

NEXPERIA

安世

丝印：D2；Package：SOT666；NPN/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k

1.1 General description NPN/PNP double Resistor-Equipped Transistors (RET) in Surface-Mounted Device (SMD) plastic packages. 1.2 Features and benefits 1.3 Applications Table 1. Product overview Type number Package PNP/PNP complement NPN/NPN complement Package 恩XP JEITA configuration PE

文件：1.27616 Mbytes 页数：17 Pages

NEXPERIA

安世

丝印：D2；Package：SOT-666；NPN/PNP resistor-equipped transistors; R1 = 47 k廓, R2 = 47 k廓

DESCRIPTION NPN/PNP resistor-equipped transistors (see “Simplified outline, symbol and pinning” for package details). FEATURES • Built-in bias resistors • Simplified circuit design • Reduction of component count • Reduced pick and place costs. APPLICATIONS • Low current peripheral driver

文件：147.85 Kbytes 页数：8 Pages

恩XP

丝印：D2；Package：SOT-666；NPN/PNP resistor-equipped transistors

DESCRIPTION NPN/PNP resistor-equipped transistor in a SOT666 plastic package. FEATURES • 300 mW total power dissipation • Very small 1.6 mm x 1.2 mm ultra thin package • Excellent coplanarity due to straight leads • Replaces two SC-75/SC-89 packaged transistors on same PCB area • Reduces re

文件：66.08 Kbytes 页数：12 Pages

PHI

PHI

NPN/PNP resistor-equipped transistors; R1 = 4.7 kohm, R2 = 47 kohm

DESCRIPTION NPN/PNP resistor-equipped transistors (see “Simplified outline, symbol and pinning” for package details). FEATURES • Built-in bias resistors • Simplified circuit design • Reduction of component count • Reduced pick and place costs. APPLICATIONS • Low current

文件：67.06 Kbytes 页数：12 Pages

PHI

PHI