丝印：D2；Package：SOT-666；NPN/PNP resistor-equipped transistors

DESCRIPTION NPN/PNP resistor-equipped transistor in a SOT666 plastic package. FEATURES • 300 mW total power dissipation • Very small 1.6 mm x 1.2 mm ultra thin package • Excellent coplanarity due to straight leads • Replaces two SC-75/SC-89 packaged transistors on same PCB area • Reduces re

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PHI

飞利浦

丝印：D2；Package：SOT-666；NPN/PNP resistor-equipped transistors; R1 = 47 k廓, R2 = 47 k廓

DESCRIPTION NPN/PNP resistor-equipped transistors (see “Simplified outline, symbol and pinning” for package details). FEATURES • Built-in bias resistors • Simplified circuit design • Reduction of component count • Reduced pick and place costs. APPLICATIONS • Low current peripheral driver

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恩XP

丝印：D2；Package：SOT666；NPN/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k

1.1 General description NPN/PNP double Resistor-Equipped Transistors (RET) in Surface-Mounted Device (SMD) plastic packages. 1.2 Features and benefits 1.3 Applications Table 1. Product overview Type number Package PNP/PNP complement NPN/NPN complement Package NXP JEITA configuration PE

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NPN/PNP resistor-equipped transistors; R1 = 47 k?? R2 = 47 k?

文件：965.89 Kbytes 页数：16 Pages

PHI

飞利浦

NPN/PNP double Resistor-Equipped Transistor; R1=47kΩ,R2=47kΩ

NPN/PNP double Resistor-Equipped Transistor (RET) in an ultra small flat lead SOT666 Surface-Mounted Device (SMD) plastic package. • 100 mA output current capability\n• Built-in bias resistors\n• Simplified circuit design\n• Reduces component count\n• Reduces pick and place costs\n• AEC-Q101 qualified;

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