NB4N316M数据手册集成电路（IC）的专用逻辑器件规格书PDF

描述 Description

The NB4N316M is a differential Clock or Data receiver and will accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to CML, operating up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB4N316M is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The CML outputs are 16 mA open collector which require a resistor load path to VTT termination voltage. The open collector CML outputs must be terminated to VTT at power up. The differential outputs produce Current Mode Logic (CML) compatible levels when the receiver is loaded with 50-ohm or 25-ohm loads connected to 1.8 V, 2.5 V or 3.3 V supplies. This simplifies device interface by eliminating a need for coupling capacitors. The NB4N316M features an input threshold of approximately 25mV, providibg increased noise immunity and stability. The device is offered in a small 8-pin TSSOP package (MSOP-8 compatible).

特性 Features

• Maximum Input Clock Frequency > 2.0 GHz
• Maximum Input Data Rate > 2.5 Gb/s
• Typically 1 ps of RMS Clock Jitter
• Typically 10 ps of Data Dependent Jitter
• 550 ps Typical Propagation Delay
• 150 ps Typical Rise and Fall Times
• Differential Open Collector CML Outputs

应用 Application

• Signal interface translation for Networking and ATE
• High Speed CLOCK Applications

简介

NB4N316M属于集成电路（IC）的专用逻辑器件。由制造生产的NB4N316M专用逻辑器件专用逻辑 IC 设计提供应用特定的逻辑输出类型，例如 BCD 速率倍增、可寻址扫描端口、总线终端阵列、CML 驱动器、比较器、ABT 扫描测试、二进制全加法器、互补对加逆变器、可配置缓冲器、触点颤动消除器、晶体振荡器、延迟元件、差分接收器、LVTTL 到 GTLP 收发器、存储器解码器、电源良好检测器和分频器。