NB3V63143G数据手册集成电路（IC）的时钟发生器PLL频率合成器规格书PDF

描述 Description

The NB3V63143G, which is a member of the OmniClock family, is a one−time programmable (OTP), low power PLL−based clock generator that supports any output frequency from 8 kHz to 200 MHz. The device accepts fundamental mode parallel resonant crystal or a single ended (LVCMOS) reference clock as input.
It generates either three single ended (LVCMOS) outputs, or one single ended output and one differential (LVDS/HCSL) output. The output signals can be modulated using the spread spectrum feature of the PLL (programmable spread spectrum type, deviation and rate) for applications demanding low electromagnetic interference (EMI). Individual output enable pins OE[2:0] are available to enable/disable the outputs. Individual output voltage pins VDDO[2:0] are available to independently set the output voltage of each output. Up to four different configurations can be written into the device memory.
Two selection pins (SEL[1:0]) allow the user to select the configuration to use. Using the PLL bypass mode, it is possible to get a copy of the input clock on any or all of the outputs. The device can be powered down using the Power Down pin (PD#). It is possible to program the internal input crystal load capacitance and the output drive current provided by the device. The device also has automatic gain control (crystal power limiting) circuitry which avoids the device overdriving the external crystal.

特性 Features

• Member of the OmniClock Family of Programmable Clock Generators
• Operating Power Supply: 1.8 V ± 0.1 V
• I/O Standards - Inputs: LVCMOS, Fundamental Mode Crystal - Outputs: 1.8 V LVCMOS - Outputs: LVDS and HCSL
• 3 Programmable Single Ended (LVCMOS) Outputs from 8 kHz to 200 MHz
• 1 Programmable Differential Clock Output up to 200 MHz
• Input Frequency Range - Crystal: 3 MHz to 50 MHz - Reference Clock: 3 MHz to 200 MHz
• Configurable Spread Spectrum Frequency Modulation Parameters (Type, Deviation, Rate)
• Individual Output Enable Pins
• Independent Output Voltage Pins
• Programmable Internal Crystal Load Capacitors
• Programmable Output Drive Current for Single Ended Outputs
• Power Saving Mode through Power Down Pin
• Programmable PLL Bypass Mode
• Programmable Output Inversion
• Temperature Range −40°C to 85°C

应用 Application

• Consumer
• Industrial Equipment
• Computing & Peripherals
• Portable equipment
• Smart Wearables
• Smart Phones
• Digital Cameras
• Camcorders
• Set Top Boxes
• Printers
• eBooks
• Media Players

简介

NB3V63143G属于集成电路（IC）的时钟发生器PLL频率合成器。由制造生产的NB3V63143G时钟发生器，PLL，频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲，这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。