NB3N511中文资料PLL Clock Multiplier, 4 MHz - 200 MHz, 3.3 V / 5.0 V数据手册ONSEMI规格书

描述 Description

The NB3N511 is a clock multiplier that will generate one of nine selectable output multiples of an input frequency via two 3 level select inputs (S0, S1). It accepts a standard fundamental mode crystal or an external reference clock signal. Phase Locked Loop (PLL) design techniques are used to produce a low jitter, TTL level clock output up to 200 MHz with a 50% duty cycle. An Output Enable (OE) pin is provided, and when asserted low, the clock output goes into tri-state (high impedance). The NB3N511 is commonly used in electronic systems as a cost efficient replacement for crystal oscillators

特性 Features

• Clock Output Frequencies up to 200 MHz
• Nine Selectable Multipliers of the Input Frequency
• Operating Range: VDD = 3.3 V +/-10% or 5.0 V +/-5%
• Low Jitter Output of 25 ps One Sigma (rms)
• Zero ppm Clock Multiplication Error
• 45% to 55% Output Duty Cycle
• TTL/CMOS Output with 25 mA TTL Level Drive
• Crystal Reference Input Range of 5 to 32 MHz
• Input Clock Frequency Range of 1 to 50 MHz
• OE, Output Enable with Tri State Output
• 8-Pin SOIC
• Industrial Temperature Range -40C to +85C
• These are PbFree Devices

应用 Application

• Networking and Telecommunications
• Consumer
• Industrial
• Medical
• Servers
• Routers
• Set-Top Box

简介

NB3N511属于集成电路（IC）的时钟发生器PLL频率合成器。由制造生产的NB3N511时钟发生器，PLL，频率合成器时钟发生器、PLL 和频率合成器集成电路 (IC) 可为逻辑器件提供参考信号的稳定定时脉冲，这些器件包括计算机、微控制器、数据通信系统和图形/视频发生器。这些集成电路可能包括缓冲器、驱动器、分频器、倍频器、多路复用器、合成器、扇出分配器和预分频器。