NB3N853531E中文资料Xtal Input or LVTTL / LVCMOS Input Mux - 2:1, 3.3 V, Fanout Buffer- 1:4 LVPECL数据手册ONSEMI规格书

描述 Description

The NB3N853531E is a low skew 3.3 V supply 2:1:4 clock distribution fanout buffer. An input MUX selects either a Fundamental Parallel Mode Crystal or a LVCMOS/LVTTL Clock by using the CLK_SEL pin (HIGH for Crystal, LOW for Clock) with LVCMOS / LVTTL levels. The single ended CLK input is translated to four LVPECL Outputs.Using the crystal input, the NB3N853531E can be a Clock Generator.A CLK_EN pin can enable or disable the outputs synchronously to eliminate runt pulses using LVCMOS/LVTTL levels (HIGH to enable outputs, LOW to disable output).

特性 Features

• Four Differential LVPECL Outputs
• Multiple copies of the Clock
• Selectable Crystal or LVCMOS/LVTTL CLOCK Inputs
• Accepts inexpensive crystals
• Operating Range: VCC = 3.3 5% V( 3.135 to 3.465 V)
• Ensures operation in the majority of designs
• PbFree TSSOP20 Package
• Meets all green international materials standards
• Up to 266 MHz Clock Operation
• Output to Output Skew: 30 ps (Typ)
• Device to Device Skew 200 ps (Max)
• Propagation Delay 1.8 ns (Max)
• Additive Phase Jitter, RMS: 0.053 ps (Typ.)
• Synchronous Clock Enable Control
• Industrial Temp. Range (40C to 85C)
• These are PbFree Devices
• 10Gigibit Ethernet

应用 Application

• Gigibit Ethernet
• SONET/SDH
• Teleconmmunications
• LAN/WAN
• Enterprise Servers
• ATE
• Test and Measurement

简介

NB3N853531E属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的NB3N853531E时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。