NB3N4666C中文资料四路 LVCMOS 差分线路接收器转换器，3.3 V数据手册ONSEMI规格书

描述 Description

The NB3N4666C is a quad−channel LVDS line receiver/translator offering data rates up to 400 Mbps (200 MHz) and low power
consumption. The NB3N4666C receiver incorporates input fail−safe protection circuit that provides a known output voltage under input open−circuit, short and terminated (100 Ω) conditions. The four independent inputs accept differential signals such as: M−LVDS, LVDS, LVPECL and HCSL and translates them to a single−ended, 3.3 V LVCMOS.
The NB3N4666C also offers active high and active low enable/disable inputs (EN and EN) that allow users to control outputs of all four receivers. These inputs enable or disable the receivers and
switch the outputs to an active or high impedance state respectively. The high impedance mode feature helps to reduce the quiescent power consumption to less than 10 mW typical, when the
outputs of one or more NB3N4666C devices are multiplexed together.

特性 Features

• High Impedance Outputs When Disabled
• Low Quiescent Power
• Accepts M−LVDS, LVDS, LVPECL and HCSL Differential Input Signal Levels
• Maximum Data Rate of 400 Mbps
• Maximum Clock Frequency of 200 MHz
• 25 ps Typical Channel−to−Channel Skew
• 3.3 ns Maximum Propagation Delay
• 3.3 V ±10% Power Supply
• Supports Open, Short, and Terminated Input Fail−safe
• −40°C to +85°C Ambient Operating Temperature
• 16−Pin TSSOP, 5.0 mm x 4.4 mm x 1.2 mm, Pb−Free

应用 Application

• Point-to-point Data Transmission
• Backplane Receivers
• Clock Distribution Networks
• Multidrop Buses

简介

NB3N4666C属于集成电路（IC）的驱动器接收器收发器。由制造生产的NB3N4666C驱动器，接收器，收发器该系列产品的主要功能是提供必需的硬件资源，以通过延长电缆或印制线进行通信。确切的功能会因所采用的通信协议而异，可能包括诸如瞬态抑制之类的功能，这些功能对于通信用途可能并非绝对必要，但对于可能的使用环境却是明智之选。