NB4N121K中文资料Clock Fanout Buffer, 1:21 Differential, 3.3 V, with HCSL Level Output数据手册ONSEMI规格书

描述 Description

The NB4N121K is a Clock differential input fanout distribution 1 to 21 HCSL level differential outputs, optimized for ultra low propagation delay variation. The NB4N121K is designed with HCSL clock distribution for FBDIMM applications in mind. Inputs can accept differential LVPECL, CML, or LVDS levels. Single-ended LVPECL, CML, LVCMOS or LVTTL levels are accepted with the proper VREFAC supply (see Figures 5, 10, 11, 12, and 13). Clock input pins incorporate an internal 50 ohm on die termination resistors.

特性 Features

• Typical Input Clock Frequency 100, 133, 166, 200, 266, 333 and400 MHz
• Meets wide range of FBDIMM bus frequencies
•
• Best in class for jitter performance
• Operating Range: VCC = 3.0 V to 3.6 V with VEE = 0 V
• Ensures operation in the majority of designs
• 340 ps Typical Rise and Fall Times
• 800 ps Typical Propagation Delay tPD 100 ps Maximum Propagation
• Delta tPD 100 ps Maximum Propagation Delay Variation Per Each Differential Pair
• Differential HCSL Output Level (700 mV Peak-to-Peak)

应用 Application

• FBDIMM Clock Distribution
• PCIe I, II, II
• Networking
• Clock Distribution
• High End Computing
• FBDIMM Memory Support
• Servers
• Routers

简介

NB4N121K属于开发板套件编程器的评估演示板及套件。由制造生产的NB4N121K评估和演示板及套件该系列产品提供了一种方便的方法，在经过验证的实施环境中评估某些重点器件的性能或特性。评估方法通常有完善的文档说明，并且视乎具体情况由评估软件提供支持。产品通常由印刷电路板组成，板上已装有重点器件以及必要或有用的支持元器件，另外也可能包括其他组件，例如电缆或电源。对于数量特别多或类别独特的器件类别(如 ADC、DAC 和开关模式电源)，评估平台可组合为一个单独的产品系列。