4 BIT D TYPE LATCH

DESCRIPTION The M74HCT75 is an high speed CMOS 4 BIT D TYPE LATCH fabricated with silicon gate C2MOS technology. ■ HIGH SPEED : tPD = 21ns (TYP.) at VCC = 4.5V ■ LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C ■ COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0

文件：280.94 Kbytes 页数：9 Pages

STMICROELECTRONICS

意法半导体

Quad bistable transparent latch

General description The 74HC75 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC75 is specified in compliance with JEDEC standard no. 7A. The 74HC75 has four bistable latches. The two latches are simultaneously controlled by one of two active

文件：57.41 Kbytes 页数：7 Pages

PHI

飞利浦

Quad bistable transparent latch

General description The 74HC75 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC75 is specified in compliance with JEDEC standard no. 7A. The 74HC75 has four bistable latches. The two latches are simultaneously controlled by one of two active

文件：57.41 Kbytes 页数：7 Pages

PHI

飞利浦

Dual 2-Bit Bistable Transparent Latch

文件：348.92 Kbytes 页数：15 Pages

TI

德州仪器