丝印：ICS8545BGILF；Package：TSSOP；Low Skew, 1-to-4 LVCMOS/ LVTTL-to-LVDS Fanout Buffer

Features • Four differential LVDS output pairs • Two LVCMOS/LVTTL clock inputs to support redundant or selectable frequency fanout applications • Maximum output frequency: 650MHz • Translates LVCMOS/LVTTL input signals to LVDS levels • Output skew: 40ps (maximum) • Part-to-part skew: 500ps

文件：510.17 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：ICS8545BGILF；Package：TSSOP；Low Skew, 1-to-4 LVCMOS/ LVTTL-to-LVDS Fanout Buffer

Features • Four differential LVDS output pairs • Two LVCMOS/LVTTL clock inputs to support redundant or selectable frequency fanout applications • Maximum output frequency: 650MHz • Translates LVCMOS/LVTTL input signals to LVDS levels • Output skew: 40ps (maximum) • Part-to-part skew: 500ps

文件：510.17 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：ICS8545BGILF；Package：TSSOP；Low Skew, 1-to-4 LVCMOS/ LVTTL-to-LVDS Fanout Buffer

Features • Four differential LVDS output pairs • Two LVCMOS/LVTTL clock inputs to support redundant or selectable frequency fanout applications • Maximum output frequency: 650MHz • Translates LVCMOS/LVTTL input signals to LVDS levels • Output skew: 40ps (maximum) • Part-to-part skew: 500ps

文件：510.17 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：ICS8545BGILF；Package：TSSOP；Low Skew, 1-to-4 LVCMOS/ LVTTL-to-LVDS Fanout Buffer

Features • Four differential LVDS output pairs • Two LVCMOS/LVTTL clock inputs to support redundant or selectable frequency fanout applications • Maximum output frequency: 650MHz • Translates LVCMOS/LVTTL input signals to LVDS levels • Output skew: 40ps (maximum) • Part-to-part skew: 500ps

文件：510.17 Kbytes 页数：16 Pages

RENESAS

瑞萨