丝印：ICS8731CY01L；Package：LQFP；Low SKEW, 1-to-11 Differential-to-3.3V LVPECL Clock Multiplier / Zero Delay Buffer

FEATURES • Eleven differential 3.3V LVPECL outputs • Differential reference clock input pair • REF_CLK, nREF_CLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Maximum reference clock input frequency: 200MHz • V

文件：457.81 Kbytes 页数：18 Pages

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丝印：ICS8731CY01L；Package：LQFP；Low SKEW, 1-to-11 Differential-to-3.3V LVPECL Clock Multiplier / Zero Delay Buffer

FEATURES • Eleven differential 3.3V LVPECL outputs • Differential reference clock input pair • REF_CLK, nREF_CLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Maximum reference clock input frequency: 200MHz • V

文件：457.81 Kbytes 页数：18 Pages

RENESAS

瑞萨