型号 | 下载 订购 | 功能描述 | 制造商 上传企业 | LOGO |
---|---|---|---|---|
HEF40174B | Hex D-type flip-flop DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i 文件:62.8 Kbytes 页数:5 Pages | PHI 飞利浦 | PHI | |
Hex D-type flip-flop DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i 文件:62.8 Kbytes 页数:5 Pages | PHI 飞利浦 | PHI | ||
Hex D-type flip-flop DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i 文件:62.8 Kbytes 页数:5 Pages | PHI 飞利浦 | PHI | ||
Hex D-type flip-flop DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i 文件:62.8 Kbytes 页数:5 Pages | PHI 飞利浦 | PHI | ||
Hex D-type flip-flop DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i 文件:62.8 Kbytes 页数:5 Pages | PHI 飞利浦 | PHI | ||
Hex D-type flip-flop DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i 文件:62.8 Kbytes 页数:5 Pages | PHI 飞利浦 | PHI | ||
HEF40174B | Hex D-type flip-flop | 恩XP 恩智浦 | 恩XP |
详细参数
- 型号:
HEF40174B
- 功能描述:
Hex D-type flip-flop
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
PHIEIPS |
25+ |
SMD |
3200 |
绝对原装自家现货!真实库存!欢迎来电! |
询价 | ||
PHI |
2015+ |
DIP |
19889 |
一级代理原装现货,特价热卖! |
询价 | ||
恩XP |
23+ |
SOP16 |
8000 |
原装正品,假一罚十 |
询价 | ||
PHI |
25+ |
TQFP32 |
18000 |
原厂直接发货进口原装 |
询价 | ||
PHI |
24+ |
SOP |
100 |
询价 | |||
恩XP |
24+ |
DIP |
5000 |
NXP一级代理商原装进口现货 |
询价 | ||
PH |
23+ |
NA |
636 |
专做原装正品,假一罚百! |
询价 | ||
PHI |
三年内 |
1983 |
只做原装正品 |
询价 | |||
菲利浦 |
24+ |
DIP |
20000 |
全新原厂原装,进口正品现货,正规渠道可含税!! |
询价 | ||
恩XP |
20+ |
DIP |
11520 |
特价全新原装公司现货 |
询价 |
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