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型号	下载订购	功能描述	制造商上传企业	LOGO
HCC40174BD	文件：303.47 Kbytes Page：24 Pages	Rad-hard high voltage CMOS logic series 文件：303.47 Kbytes 页数：24 Pages	STMICROELECTRONICS 意法半导体	STMICROELECTRONICS
HEF40174BD	文件：62.8 Kbytes Page：5 Pages	Hex D-type flip-flop DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i 文件：62.8 Kbytes 页数：5 Pages	PHI PHI	PHI
HEF40174BF	文件：62.8 Kbytes Page：5 Pages	Hex D-type flip-flop DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i 文件：62.8 Kbytes 页数：5 Pages	PHI PHI	PHI
HEF40174BT	文件：62.8 Kbytes Page：5 Pages	Hex D-type flip-flop DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP i 文件：62.8 Kbytes 页数：5 Pages	PHI PHI	PHI

更多HCC40174BD供应商更新时间2026-4-2 14:05:00