Hex/Quad D-Type Flip-Flops with Clear

General Description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. Both have an asynchronous clear input, and the quad (DM74ALS175) version features complementary outputs from each flip-flop. Information at the D inputs meeting the setup time

文件：73.3 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Hex/Quad D-Type Flip-Flops with Clear

General Description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. Both have an asynchronous clear input, and the quad (DM74ALS175) version features complementary outputs from each flip-flop. Information at the D inputs meeting the setup time

文件：73.3 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Hex/Quad D-Type Flip-Flops with Clear

General Description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. Both have an asynchronous clear input, and the quad (DM74ALS175) version features complementary outputs from each flip-flop. Information at the D inputs meeting the setup time

文件：73.3 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Hex/Quad D-Type Flip-Flops with Clear

General Description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. Both have an asynchronous clear input, and the quad (DM74ALS175) version features complementary outputs from each flip-flop. Information at the D inputs meeting the setup time

文件：73.3 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Hex/Quad D-Type Flip-Flops with Clear

General Description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. Both have an asynchronous clear input, and the quad (DM74ALS175) version features complementary outputs from each flip-flop. Information at the D inputs meeting the setup time

文件：73.3 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Hex/Quad D-Type Flip-Flops with Clear

General Description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. Both have an asynchronous clear input, and the quad (DM74ALS175) version features complementary outputs from each flip-flop. Information at the D inputs meeting the setup time

文件：73.3 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Hex/Quad D-Type Flip-Flops with Clear

General Description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. Both have an asynchronous clear input, and the quad (DM74ALS175) version features complementary outputs from each flip-flop. Information at the D inputs meeting the setup time

文件：73.3 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Hex/Quad D-Type Flip-Flops with Clear

General Description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. Both have an asynchronous clear input, and the quad (DM74ALS175) version features complementary outputs from each flip-flop. Information at the D inputs meeting the setup time

文件：73.3 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Hex/Quad D-Type Flip-Flops with Clear

General Description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. Both have an asynchronous clear input, and the quad (DM74ALS175) version features complementary outputs from each flip-flop. Information at the D inputs meeting the setup time

文件：73.3 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Dual 4-Input NAND Gate

General Description This device contains two independent gates, each of which performs the logic NAND function. Features ■ Switching specifications at 50 pF ■ Switching specifications guaranteed over full temperature and VCC range ■ Advanced oxide-isolated, ion-implanted Schottky TT

文件：46.22 Kbytes 页数：4 Pages

FAIRCHILD

仙童半导体