13-Input NAND Gate

General Description This device contains a single gate, which performs the logic NAND function. Features ■ Switching specifications at 50 pF ■ Switching specifications guaranteed over full temperature and VCC range ■ Advanced oxide-isolated, ion-implanted Schottky TTL process ■ Functionally

文件：43.1 Kbytes 页数：4 Pages

FAIRCHILD

仙童半导体

13-Input NAND Gate

General Description This device contains a single gate, which performs the logic NAND function. Features ■ Switching specifications at 50 pF ■ Switching specifications guaranteed over full temperature and VCC range ■ Advanced oxide-isolated, ion-implanted Schottky TTL process ■ Functionally

文件：43.1 Kbytes 页数：4 Pages

FAIRCHILD

仙童半导体

3 to 8 Line Decoder/Demultiplexer with Address Latches

General Description The ALS137 is a three line to eight line decoder/demultiplexer with latches on the three address inputs. When the latch-enable input (GL) is LOW, the ALS137 acts as a decoder/demultiplexer. When GL goes from LOW-to-HIGH, the address present at the select inputs (A, B, and C) i

文件：57.23 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

3 to 8 Line Decoder/Demultiplexer with Address Latches

General Description The ALS137 is a three line to eight line decoder/demultiplexer with latches on the three address inputs. When the latch-enable input (GL) is LOW, the ALS137 acts as a decoder/demultiplexer. When GL goes from LOW-to-HIGH, the address present at the select inputs (A, B, and C) i

文件：57.23 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

3 to 8 Line Decoder/Demultiplexer with Address Latches

General Description The ALS137 is a three line to eight line decoder/demultiplexer with latches on the three address inputs. When the latch-enable input (GL) is LOW, the ALS137 acts as a decoder/demultiplexer. When GL goes from LOW-to-HIGH, the address present at the select inputs (A, B, and C) i

文件：57.23 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

3 to 8 Line Decoder/Demultiplexer

General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. Whe

文件：66.3 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

3 to 8 Line Decoder/Demultiplexer

General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. Whe

文件：66.3 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

3 to 8 Line Decoder/Demultiplexer

General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. Whe

文件：66.3 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

3 to 8 Line Decoder/Demultiplexer

General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. Whe

文件：66.3 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

Hex Inverter with Schmitt Trigger Inputs

General Description This device contains six independent gates, each of which performs the logic INVERT function. Each input has hysteresis which increases the noise immunity and transforms a slowly changing input signal to a fast changing, jitter-free output. Features ■ Input hysteresi

文件：76.81 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体