CY7C21

256/512/1K/2K/4K x 9 Asynchronous FIFO

CY7C2163KV18

18-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT

FunctionalDescription TheCY7C2163KV18,andCY7C2165KV18are1.8VsynchronouspipelinedSRAMs,equippedwithQDRII+architecture.SimilartoQDRIIarchitecture,QDRII+architectureconsistsoftwoseparateports:thereadportandthewriteporttoaccessthememoryarray.Thereadportha

CY7C2165KV18

18-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT

FunctionalDescription TheCY7C2163KV18,andCY7C2165KV18are1.8VsynchronouspipelinedSRAMs,equippedwithQDRII+architecture.SimilartoQDRIIarchitecture,QDRII+architectureconsistsoftwoseparateports:thereadportandthewriteporttoaccessthememoryarray.Thereadportha

CY7C2168KV18

18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT

FunctionalDescription TheCY7C2168KV18,andCY7C2170KV18are1.8VSynchronousPipelinedSRAMsequippedwithDDRII+architecture.TheDDRII+consistsofanSRAMcorewithadvancedsynchronousperipheralcircuitry.Addressesforreadandwritearelatchedonalternaterisingedgesoftheinpu

CY7C2170KV18

18-Mbit DDR II SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT

FunctionalDescription TheCY7C2168KV18,andCY7C2170KV18are1.8VSynchronousPipelinedSRAMsequippedwithDDRII+architecture.TheDDRII+consistsofanSRAMcorewithadvancedsynchronousperipheralcircuitry.Addressesforreadandwritearelatchedonalternaterisingedgesoftheinpu

CY7C2163KV18-450BZXI

Synchronous SRAM;

CY7C2163KV18-550BZXI

Synchronous SRAM;

CY7C2165KV18

18-Mbit QDR® II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT;

CY7C21701KV18

18-Mbit DDR II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) with ODT

CY7C21701KV18-400BZXC

18-Mbit DDR II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) with ODT