P-channel enhancement mode vertical D-MOS transistors

DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a TO-92 variant package. FEATURES • Direct interface to C-MOS, TTL etc. • High speed switching • No secondary breakdown. APPLICATIONS • Intended for use as a Line current interruptor in telephone sets and for applications i

文件：75.87 Kbytes 页数：9 Pages

PHI

PHI

P-channel vertical D-MOS intermediate level FET

Intermediate level P-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using vertical D-MOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only.

Nexperia

安世

DPAK SURFACE MOUNT SUPER FAST RECOVERY RECTIFIER(VOLTAGE - 200 to 600 Volts CURRENT - 3.0 Amperes)

VOLTAGE 200 to 600 Volts CURRENT 3.0 Amperes FEATURES • Superfast recovery times-epitaxial construction. • Low forward voltage, high current capability. • Exceeds environmental standards of MIL-S-19500/228. • Hermetically sealed. • Low leakage. • High surge capability. • Plastic package ha

文件：33.34 Kbytes 页数：2 Pages

PANJIT

強茂

Negative Regulator

文件：161.59 Kbytes 页数：6 Pages

NSC

国半

Negative Regulator

文件：161.59 Kbytes 页数：6 Pages

NSC

国半