丝印：ABT16823；Package：CFP；SCAN TEST DEVICES WITH 18-BIT BUS TRANSCEIVERS

Members of the Texas Instruments SCOPE E Family of Testability Products Members of the Texas Instruments WidebusE Family Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture SCOPE E Instruction Set – IEEE Standard 1149.1-1990 Required Instru

文件：868.21 Kbytes 页数：38 Pages

TI

德州仪器

丝印：ABT16823；Package：TSSOP；SCAN TEST DEVICES WITH 18-BIT BUS TRANSCEIVERS

Members of the Texas Instruments SCOPE E Family of Testability Products Members of the Texas Instruments WidebusE Family Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture SCOPE E Instruction Set – IEEE Standard 1149.1-1990 Required Instru

文件：868.21 Kbytes 页数：38 Pages

TI

德州仪器

丝印：ABT16823；Package：TSSOP；18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R

文件：781.19 Kbytes 页数：22 Pages

TI

德州仪器

丝印：ABT16823；Package：TSSOP；18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R

文件：781.19 Kbytes 页数：22 Pages

TI

德州仪器

丝印：ABT16823；Package：TSSOP；18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R

文件：781.19 Kbytes 页数：22 Pages

TI

德州仪器

丝印：ABT16823；Package：SSOP；18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R

文件：781.19 Kbytes 页数：22 Pages

TI

德州仪器

丝印：ABT16823；Package：SSOP；18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R

文件：781.19 Kbytes 页数：22 Pages

TI

德州仪器

丝印：ABT16823；Package：SSOP；18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R

文件：781.19 Kbytes 页数：22 Pages

TI

德州仪器

丝印：ABT16823；Package：SSOP；18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R

文件：781.19 Kbytes 页数：22 Pages

TI

德州仪器

丝印：ABT16823；Package：TSSOP；SCAN TEST DEVICES WITH 18-BIT BUS TRANSCEIVERS

Members of the Texas Instruments SCOPE E Family of Testability Products Members of the Texas Instruments WidebusE Family Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture SCOPE E Instruction Set – IEEE Standard 1149.1-1990 Required Instru

文件：868.21 Kbytes 页数：38 Pages

TI

德州仪器