Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM

Description DB1200 Rev 2.0 Intel Yellow Cover Device Features/Benefits • 3 selectable SMBus addresses for easy system expansion • Spread spectrum modulation tolerant, 0 to -0.5 down spread and +/- 0.25 center spread • Supports undriven differential outputs in Power Down Mode for power man

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12-Output Differential Buffer for PCIe Gen3

Description The 9DB1233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB1233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input cloc

文件：495.35 Kbytes 页数：18 Pages

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19 Output Differential Buffer for PCIe Gen2 and QPI

Description The 9DB1904 is electrically compatible to the Intel DB1900GS Differential Buffer Specification. This buffer provides 19 output clocks for PCI-Express Gen2 or Intel QPI 6.4GT/s applications. A differential clock from a CK410B+ main clock generator, such as the ICS932S421 drives the

文件：318.06 Kbytes 页数：19 Pages

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Nineteen Output Differential Buffer for PCIe Gen3

General Description The 9DB1933 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB1933 is driven by a differential SRC output pair from an IDT 932S421, 932SQ420, or equivalent, main clock generator. It attenuates jitter on the in

文件：329.63 Kbytes 页数：18 Pages

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PCI Express Jitter Attenuator 9DB202

GENERAL DESCRIPTION The 9DB202 is a high perfromance 1-to-2 Differential-to-HCSL Jitter Attenuator designed for use in PCI Express™ systems. In some PCI Express™ systems, such as those found in desktop PCs, the PCI Express™ clocks are generated from a low bandwidth, high phase noise PLL frequ

文件：367.03 Kbytes 页数：14 Pages

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PCI Express Jitter Attenuator 9DB202-01

GENERAL DESCRIPTION The 9DB202-01 is a high performance 1-to-1 Differential-to HCSL Jitter Attenuator designed for use in PCI Express™ systems. In some PCI Express systems, such as those found in desktop PCs, the PCI Express clocks are generated from a low bandwidth, high phase noise PLL freq

文件：412.82 Kbytes 页数：18 Pages

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PCI Express Jitter Attenuator

GENERAL DESCRIPTION The 9DB206 is a high perfromance 1-to-6 Differential-to-HCSL Jitter Attenuator designed for use in PCI Express™ systems. In some PCI Express systems, such as those found in desktop PCs, the PCI Express clocks are generated from a low bandwidth, high phase noise PLL frequen

文件：367.13 Kbytes 页数：15 Pages

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TWO OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN3

Description The 9DB233 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB233 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. It attenuates jitter on the input clock

文件：376.11 Kbytes 页数：18 Pages

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TWO OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN3

• OE# pins; suitable for Express Card applications • PLL or bypass mode; PLL can dejitter incoming clock • Selectable PLL bandwidth; minimizes jitter peaking in downstream PLL's • Spread Spectrum Compatible; tracks spreading input clock for low EMI • SMBus Interface; allows control of PLL BW

文件：343.89 Kbytes 页数：18 Pages

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TWO OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN3

• OE# pins; suitable for Express Card applications • PLL or bypass mode; PLL can dejitter incoming clock • Selectable PLL bandwidth; minimizes jitter peaking in downstream PLL's • Spread Spectrum Compatible; tracks spreading input clock for low EMI • SMBus Interface; allows control of PLL BW

文件：343.89 Kbytes 页数：18 Pages

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