丝印：75LVDS32；Package：SOIC；HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

Meets or Exceeds the Requirements of ANSI TIA/EIA-644 Standard Operates With a Single 3.3-V Supply Designed for Signaling Rate of up to 155 Mbps Differential Input Thresholds ±100 mV Max Low-Voltage TTL (LVTTL) Logic Output Levels Open-Circuit Fail Safe Characterized For Operation From 0

文件：331.67 Kbytes 页数：20 Pages

TI

德州仪器

丝印：75LVDS32；Package：SOIC；HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

Meets or Exceeds the Requirements of ANSI TIA/EIA-644 Standard Operates With a Single 3.3-V Supply Designed for Signaling Rate of up to 155 Mbps Differential Input Thresholds ±100 mV Max Low-Voltage TTL (LVTTL) Logic Output Levels Open-Circuit Fail Safe Characterized For Operation From 0

文件：331.67 Kbytes 页数：20 Pages

TI

德州仪器

丝印：75LVDS32；Package：SOIC；HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

Meets or Exceeds the Requirements of ANSI TIA/EIA-644 Standard Operates With a Single 3.3-V Supply Designed for Signaling Rate of up to 155 Mbps Differential Input Thresholds ±100 mV Max Low-Voltage TTL (LVTTL) Logic Output Levels Open-Circuit Fail Safe Characterized For Operation From 0

文件：331.67 Kbytes 页数：20 Pages

TI

德州仪器

丝印：75LVDS32；Package：SOIC；HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

Meets or Exceeds the Requirements of ANSI TIA/EIA-644 Standard Operates With a Single 3.3-V Supply Designed for Signaling Rate of up to 155 Mbps Differential Input Thresholds ±100 mV Max Low-Voltage TTL (LVTTL) Logic Output Levels Open-Circuit Fail Safe Characterized For Operation From 0

文件：331.67 Kbytes 页数：20 Pages

TI

德州仪器