Dual 2-input NAND gate

1. General description The 74LVC2G00 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower in

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丝印：V00；Package：SOT765-1；Dual 2-input NAND gate

1. General description The 74LVC2G00 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower in

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丝印：V2G00；Package：SOT505-2；Dual 2-input NAND gate

1. General description The 74LVC2G00 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower in

文件：302.44 Kbytes 页数：20 Pages

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丝印：VA；Package：SOT1089；Dual 2-input NAND gate

1. General description The 74LVC2G00 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower in

文件：302.44 Kbytes 页数：20 Pages

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丝印：V00；Package：SOT902-2；Dual 2-input NAND gate

1. General description The 74LVC2G00 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower in

文件：302.44 Kbytes 页数：20 Pages

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丝印：VA；Package：SOT1116；Dual 2-input NAND gate

1. General description The 74LVC2G00 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower in

文件：302.44 Kbytes 页数：20 Pages

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丝印：VA；Package：SOT1203；Dual 2-input NAND gate

1. General description The 74LVC2G00 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower in

文件：302.44 Kbytes 页数：20 Pages

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丝印：V00；Package：SOT833-1；Dual 2-input NAND gate

1. General description The 74LVC2G00 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower in

文件：302.44 Kbytes 页数：20 Pages

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丝印：VA；Package：SOT1233-2；Dual 2-input NAND gate

1. General description The 74LVC2G00 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower in

文件：302.44 Kbytes 页数：20 Pages

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Dual 2-input NOR gate

1. General description The 74LVC2G02 is a dual 2-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower inpu

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