丝印：V2G00；Package：SOT505-2；Dual 2-input NAND gate

1. General description The 74LVC2G00 is a dual 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower in

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NEXPERIA

安世

Dual 2-input NAND gate

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PANASONIC

松下

Dual 2-input NAND gate

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恩XP

Dual 2-input NAND gate

文件：279.81 Kbytes 页数：20 Pages

恩XP

Dual 2-input NAND gate

文件：279.81 Kbytes 页数：20 Pages

恩XP

Dual 2-input NAND gate

The 74LVC2G00 provides a 2-input NAND gate function.\n Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.\n This device is fully specified for partial power-down applications using IOFF. The I • Wide supply voltage range from 1.65 V to 5.5 V\n• 5 V tolerant outputs for interfacing with 5 V logic\n• High noise immunity\n• ±24 mA output drive (VCC = 3.0 V)\n• CMOS low power consumption\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 V to 2.7 V)\n• JESD8-B/JESD36;

Nexperia

安世

Package：8-TSSOP，8-MSOP（0.118"，3.00mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 门和反相器 描述：IC GATE NAND 2CH 2-INP 8TSSOP

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