Phase-locked-loop with VCO

GENERAL DESCRIPTION The 74HC/HCT4046A are high-speed Si-gate CMOS devices and are pin compatible with the “4046” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Low power consumption • Centre frequency of up to 17 MHz (typ.) at VCC= 4.5

文件：467.51 Kbytes 页数：34 Pages

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飞利浦

Phase-locked loop with VCO

1. General description The 74HC4046A; 74HCT4046A is a high-speed Si-gate CMOS device. It is specified in compliance with JEDEC standard no 7A. 2. Features and benefits • Low power consumption • VCO-Inhibit control for ON/OFF keying and for low standby power consumption • Center frequency up

文件：671.36 Kbytes 页数：36 Pages

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Phase-locked-loop with VCO

GENERAL DESCRIPTION The 74HC/HCT4046A are high-speed Si-gate CMOS devices and are pin compatible with the “4046” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Low power consumption • Centre frequency of up to 17 MHz (typ.) at VCC= 4.5

文件：467.51 Kbytes 页数：34 Pages

PHI

飞利浦

Phase-locked-loop with VCO

GENERAL DESCRIPTION The 74HC/HCT4046A are high-speed Si-gate CMOS devices and are pin compatible with the “4046” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Low power consumption • Centre frequency of up to 17 MHz (typ.) at VCC= 4.5

文件：467.51 Kbytes 页数：34 Pages

PHI

飞利浦

Phase-locked loop with VCO

1. General description The 74HC4046A; 74HCT4046A is a high-speed Si-gate CMOS device. It is specified in compliance with JEDEC standard no 7A. 2. Features and benefits • Low power consumption • VCO-Inhibit control for ON/OFF keying and for low standby power consumption • Center frequency up

文件：671.36 Kbytes 页数：36 Pages

NEXPERIA

安世

Phase-locked loop with VCO

1. General description The 74HC4046A-Q100 is a high-speed Si-gate CMOS device. It is specified in compliance with JEDEC standard no 7A. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2.

文件：598.75 Kbytes 页数：32 Pages

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安世

Phase-locked loop with VCO

1. General description The 74HC4046A-Q100 is a high-speed Si-gate CMOS device. It is specified in compliance with JEDEC standard no 7A. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2.

文件：598.75 Kbytes 页数：32 Pages

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Hex inverting HIGH-to-LOW level shifter

1. General description The 74HC4049 is a hex inverter with over-voltage tolerant inputs. Inputs are overvoltage tolerant to 15 V. This enables the device to be used in HIGH-to-LOW level shifting applications. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • Overvolta

文件：221.33 Kbytes 页数：11 Pages

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Hex inverting high-to-low level shifter

GENERAL DESCRIPTION The 74HC4049 is a high-speed Si-gate CMOS device and is pin compatible with the “4049” of the “4000B” series. It is specified in compliance with JEDEC standard no. 7A. The 74HC4049 provides six inverting buffers with a modified input protection structure, which has no diode c

文件：41.57 Kbytes 页数：7 Pages

PHI

飞利浦

Hex inverting high-to-low level shifter

GENERAL DESCRIPTION The 74HC4049 is a high-speed Si-gate CMOS device and is pin compatible with the “4049” of the “4000B” series. It is specified in compliance with JEDEC standard no. 7A. The 74HC4049 provides six inverting buffers with a modified input protection structure, which has no diode c

文件：41.57 Kbytes 页数：7 Pages

PHI

飞利浦