Low-power dual 2-input OR gate

1. General description The 74AUP2G32 is a dual 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is

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DUAL OR GATE

文件：256.149 Kbytes 页数：9 Pages

DIODES

美台半导体

Low-power dual 2-input OR gate

文件：100.98 Kbytes 页数：17 Pages

恩XP

Dual OR Gate

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G32 is a dual two input NAND gate. Both gates have push-pull outputs designed for operation over a power supply range of 0.8 V to 3.6 V. The device is fully sp

Diodes

美台半导体

丝印：p32；Package：SOT765-1；Low-power dual 2-input OR gate

1. General description The 74AUP2G32 is a dual 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is

文件：302.94 Kbytes 页数：20 Pages

NEXPERIA

安世

丝印：pG；Package：SOT1089；Low-power dual 2-input OR gate

1. General description The 74AUP2G32 is a dual 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is

文件：302.94 Kbytes 页数：20 Pages

NEXPERIA

安世

丝印：p32；Package：SOT902-2；Low-power dual 2-input OR gate

1. General description The 74AUP2G32 is a dual 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is

文件：302.94 Kbytes 页数：20 Pages

NEXPERIA

安世

丝印：pG；Package：SOT1116；Low-power dual 2-input OR gate

1. General description The 74AUP2G32 is a dual 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is

文件：302.94 Kbytes 页数：20 Pages

NEXPERIA

安世

丝印：pG；Package：SOT1203；Low-power dual 2-input OR gate

1. General description The 74AUP2G32 is a dual 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is

文件：302.94 Kbytes 页数：20 Pages

NEXPERIA

安世

丝印：p32；Package：SOT833-1；Low-power dual 2-input OR gate

1. General description The 74AUP2G32 is a dual 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is

文件：302.94 Kbytes 页数：20 Pages

NEXPERIA

安世