丝印：pG；Package：SOT1116；Low-power dual 2-input OR gate

1. General description The 74AUP2G32 is a dual 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is

文件：302.94 Kbytes 页数：20 Pages

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Low-power dual 2-input OR gate

The 74AUP2G32 provides dual 2-input OR function.\n Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.\n This device ensures a very low static and dynamic power consumption across the entire VCC ra • Wide supply voltage range from 0.8 V to 3.6 V\n• High noise immunity\n• Complies with JEDEC standards:• JESD8-12 (0.8 V to 1.3 V)\n• JESD8-11 (0.9 V to 1.65 V)\n• JESD8-7 (1.2 V to 1.95 V)\n• JESD8-5 (1.8 V to 2.7 V)\n• JESD8-B (2.7 V to 3.6 V)\n\n• ESD protection:• HBM JESD22-A114F Class 3A excee;

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Package：8-XFDFN；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 描述：IC GATE OR 2CH 2-INP 8XSON

Nexperia USA Inc.

Low-power dual 2-input OR gate

1. General description The 74AUP2G32 is a dual 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is

文件：302.94 Kbytes 页数：20 Pages

NEXPERIA

安世

Low-power dual 2-input OR gate

1. General description The 74AUP2G32 is a dual 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is

文件：302.94 Kbytes 页数：20 Pages

NEXPERIA

安世