74AUP2G14

Low-power dual Schmitt trigger inverter

1.Generaldescription The74AUP2G14isadualinverterwithSchmitt-triggerinputs.Thisdeviceensuresverylowstatic anddynamicpowerconsumptionacrosstheentireVCCrangefrom0.8Vto3.6V.Thisdeviceis fullyspecifiedforpartialpowerdownapplicationsusingIOFF.TheIOFFcircuit

74AUP2G14

Dual-gate;

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G14 is composed of two Schmitt trigger inverters with standard push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.

74AUP2G14

DUAL SCHMITT TRIGGER INVERTERS

74AUP2G14GM

Low-power dual Schmitt trigger inverter; • Wide supply voltage range from 0.8 V to 3.6 V\n• High noise immunity\n• ESD protection:• HBM JESD22-A114F Class 3A exceeds 5000 V\n• MM JESD22-A115-A exceeds 200 V\n• CDM JESD22-C101E exceeds 1000 V\n\n• Low static power consumption; ICC = 0.9 μA (maximum)\n• Latch-up performance exceeds 100 mA per JESD 78 Class II\n• Inputs accept voltages up to 3.6 V\n• Low noise overshoot and undershoot < 10 % of VCC\n• IOFF circuitry provides partial Power-down mode operation\n• Multiple package options\n• Specified from -40 °C to +85 °C and -40 °C to +125 °C\n;

The 74AUP2G14 provides two inverting buffers with Schmitt trigger action which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.\n This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.\n The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.\n

74AUP2G14GM

Marking：pK；Package：SOT886；Low-power dual Schmitt trigger inverter

1.Generaldescription The74AUP2G14isadualinverterwithSchmitt-triggerinputs.Thisdeviceensuresverylowstatic anddynamicpowerconsumptionacrosstheentireVCCrangefrom0.8Vto3.6V.Thisdeviceis fullyspecifiedforpartialpowerdownapplicationsusingIOFF.TheIOFFcircuit

74AUP2G14GN

Marking：pK；Package：SOT1115；Low-power dual Schmitt trigger inverter

1.Generaldescription The74AUP2G14isadualinverterwithSchmitt-triggerinputs.Thisdeviceensuresverylowstatic anddynamicpowerconsumptionacrosstheentireVCCrangefrom0.8Vto3.6V.Thisdeviceis fullyspecifiedforpartialpowerdownapplicationsusingIOFF.TheIOFFcircuit

74AUP2G14GN

Low-power dual Schmitt trigger inverter; • Wide supply voltage range from 0.8 V to 3.6 V\n• High noise immunity\n• ESD protection:• HBM JESD22-A114F Class 3A exceeds 5000 V\n• MM JESD22-A115-A exceeds 200 V\n• CDM JESD22-C101E exceeds 1000 V\n\n• Low static power consumption; ICC = 0.9 μA (maximum)\n• Latch-up performance exceeds 100 mA per JESD 78 Class II\n• Inputs accept voltages up to 3.6 V\n• Low noise overshoot and undershoot < 10 % of VCC\n• IOFF circuitry provides partial Power-down mode operation\n• Multiple package options\n• Specified from -40 °C to +85 °C and -40 °C to +125 °C\n;

The 74AUP2G14 provides two inverting buffers with Schmitt trigger action which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.\n This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.\n The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.\n

74AUP2G14GS

Marking：pK；Package：SOT1202；Low-power dual Schmitt trigger inverter

1.Generaldescription The74AUP2G14isadualinverterwithSchmitt-triggerinputs.Thisdeviceensuresverylowstatic anddynamicpowerconsumptionacrosstheentireVCCrangefrom0.8Vto3.6V.Thisdeviceis fullyspecifiedforpartialpowerdownapplicationsusingIOFF.TheIOFFcircuit

74AUP2G14GW

Marking：pK；Package：SOT363-2；Low-power dual Schmitt trigger inverter

1.Generaldescription The74AUP2G14isadualinverterwithSchmitt-triggerinputs.Thisdeviceensuresverylowstatic anddynamicpowerconsumptionacrosstheentireVCCrangefrom0.8Vto3.6V.Thisdeviceis fullyspecifiedforpartialpowerdownapplicationsusingIOFF.TheIOFFcircuit

74AUP2G14GX

Marking：pK；Package：SOT1255-2；Low-power dual Schmitt trigger inverter

1.Generaldescription The74AUP2G14isadualinverterwithSchmitt-triggerinputs.Thisdeviceensuresverylowstatic anddynamicpowerconsumptionacrosstheentireVCCrangefrom0.8Vto3.6V.Thisdeviceis fullyspecifiedforpartialpowerdownapplicationsusingIOFF.TheIOFFcircuit