丝印：74ACT11074N；Package：PDIP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件：664.34 Kbytes 页数：18 Pages

TI

德州仪器

丝印：74ACT11074N；Package：PDIP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件：664.34 Kbytes 页数：18 Pages

TI

德州仪器

丝印：ACT11074；Package：SOP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件：664.34 Kbytes 页数：18 Pages

TI

德州仪器

丝印：ACT11074；Package：SOP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件：664.34 Kbytes 页数：18 Pages

TI

德州仪器

QUAD 2 INPUT NAND SCHMITT TRIGGER

DESCRIPTION The 74AC/ACT11132 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. The 74AC/ACT11132 provides four separate 2-input NAND gate functions which are capable of transforming slowly changing input signals into sharpl

文件：132.45 Kbytes 页数：5 Pages

PHI

PHI

QUAD 2 INPUT NAND SCHMITT TRIGGER

DESCRIPTION The 74AC/ACT11132 high-performance CMOS devices combine very high speed and high output drive comparable to the most advanced TTL families. The 74AC/ACT11132 provides four separate 2-input NAND gate functions which are capable of transforming slowly changing input signals into sharpl

文件：132.45 Kbytes 页数：5 Pages

PHI

PHI

DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER

Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Two Enable Inputs to Simplify Cascading and/or Data Reception Fully Synchronous Operation for Counting Center-Pin VCC and GND Configurations Minimize High-Speed

文件：395.76 Kbytes 页数：14 Pages

TI

德州仪器

丝印：ACT11139；Package：SOIC；DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER

Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Two Enable Inputs to Simplify Cascading and/or Data Reception Fully Synchronous Operation for Counting Center-Pin VCC and GND Configurations Minimize High-Speed

文件：395.76 Kbytes 页数：14 Pages

TI

德州仪器

丝印：ACT11139；Package：SOIC；DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER

Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Two Enable Inputs to Simplify Cascading and/or Data Reception Fully Synchronous Operation for Counting Center-Pin VCC and GND Configurations Minimize High-Speed

文件：395.76 Kbytes 页数：14 Pages

TI

德州仪器

丝印：AT139；Package：TSSOP；DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER

Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Two Enable Inputs to Simplify Cascading and/or Data Reception Fully Synchronous Operation for Counting Center-Pin VCC and GND Configurations Minimize High-Speed

文件：395.76 Kbytes 页数：14 Pages

TI

德州仪器