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74ACT11074N

丝印:74ACT11074N;Package:PDIP;DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件:664.34 Kbytes 页数:18 Pages

TI

德州仪器

74ACT11074N.A

丝印:74ACT11074N;Package:PDIP;DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件:664.34 Kbytes 页数:18 Pages

TI

德州仪器

74ACT11074N

丝印:74ACT11074N;Package:PDIP;DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件:664.34 Kbytes 页数:18 Pages

TI

德州仪器

74ACT11074N.A

丝印:74ACT11074N;Package:PDIP;DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件:664.34 Kbytes 页数:18 Pages

TI

德州仪器

74ACT11074NSR

丝印:ACT11074;Package:SOP;DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件:664.34 Kbytes 页数:18 Pages

TI

德州仪器

74ACT11074NSR.A

丝印:ACT11074;Package:SOP;DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件:664.34 Kbytes 页数:18 Pages

TI

德州仪器

74ACT11074N

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

文件:81.99 Kbytes 页数:5 Pages

TI

德州仪器

74ACT11074N

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

文件:888.23 Kbytes 页数:14 Pages

TI

德州仪器

74ACT11074NSR

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

文件:888.23 Kbytes 页数:14 Pages

TI

德州仪器

74ACT11074NSR

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

文件:81.99 Kbytes 页数:5 Pages

TI

德州仪器

详细参数

  • 型号:

    74ACT11074N

  • 功能描述:

    触发器 Dual Pos Edge Trig

  • RoHS:

  • 制造商:

    Texas Instruments

  • 电路数量:

    2

  • 逻辑系列:

    SN74

  • 逻辑类型:

    D-Type Flip-Flop

  • 极性:

    Inverting, Non-Inverting

  • 输入类型:

    CMOS

  • 传播延迟时间:

    4.4 ns

  • 高电平输出电流:

    - 16 mA

  • 低电平输出电流:

    16 mA

  • 电源电压-最大:

    5.5 V

  • 最大工作温度:

    + 85 C

  • 安装风格:

    SMD/SMT

  • 封装/箱体:

    X2SON-8

  • 封装:

    Reel

供应商型号品牌批号封装库存备注价格
TI(德州仪器)
24+
PDIP14
924
只做原装,提供一站式配单服务,代工代料。BOM配单
询价
TEXASINSTRUMENTS
23+
NA
1111
专做原装正品,假一罚百!
询价
Texas Instruments
24+
14-DIP(0.300
56300
询价
TI
20+
IC
3854
就找我吧!--邀您体验愉快问购元件!
询价
TI(德州仪器)
2021+
PDIP-14
499
询价
Texas Instruments(德州仪器)
22+
NA
500000
万三科技,秉承原装,购芯无忧
询价
22+
NA
230
加我QQ或微信咨询更多详细信息,
询价
TI
22+
14DIP
9000
原厂渠道,现货配单
询价
TI
9311
1
公司优势库存 热卖中!
询价
TI(德州仪器)
23+
PDIP-14
9980
原装正品,支持实单
询价
更多74ACT11074N供应商 更新时间2025-9-13 11:35:00