74ACT11074N.A资料datasheet下载市场行情TI-114ic电子网

型号	下载订购	功能描述	制造商上传企业	LOGO
74ACT11074N.A	文件：664.34 Kbytes Page：18 Pages	丝印：74ACT11074N；Package：PDIP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) 文件：664.34 Kbytes 页数：18 Pages	TI 德州仪器	TI
74ACT11074NSR	文件：888.23 Kbytes Page：14 Pages	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET 文件：888.23 Kbytes 页数：14 Pages	TI 德州仪器	TI
74ACT11074NSR	文件：81.99 Kbytes Page：5 Pages	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET 文件：81.99 Kbytes 页数：5 Pages	TI 德州仪器	TI
74ACT11074NSR	文件：664.34 Kbytes Page：18 Pages	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) 文件：664.34 Kbytes 页数：18 Pages	TI 德州仪器	TI

更多74ACT11074N.A供应商更新时间2026-4-15 10:46:00