丝印：74F125；Package：SOP；QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers description/ordering information The SN74F125 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.

文件：523.46 Kbytes 页数：15 Pages

TI

德州仪器

丝印：74F125；Package：SOP；QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers description/ordering information The SN74F125 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.

文件：523.46 Kbytes 页数：15 Pages

TI

德州仪器

Quad buffers 3-State

FEATURE • High impedance NPN base inputs for reduced loading (20µA in High and Low states)

文件：77.43 Kbytes 页数：10 Pages

PHI

飞利浦

Quad Buffer (3-STATE)

Features ■ High impedance base inputs for reduced loading

文件：66.74 Kbytes 页数：5 Pages

Fairchild

仙童半导体

Quad Buffer (3-STATE)

Features ■ High impedance base inputs for reduced loading

文件：66.74 Kbytes 页数：5 Pages

Fairchild

仙童半导体

Quad Buffer (3-STATE)

Features ■ High impedance base inputs for reduced loading

文件：79.11 Kbytes 页数：5 Pages

Fairchild

仙童半导体

Quad Buffer (3-STATE)

Features ■ High impedance base inputs for reduced loading

文件：66.74 Kbytes 页数：5 Pages

Fairchild

仙童半导体

Quad Buffer (3-STATE)

Features ■ High impedance base inputs for reduced loading

文件：79.11 Kbytes 页数：5 Pages

Fairchild

仙童半导体

Quad Buffer (3-STATE)

Features ■ High impedance base inputs for reduced loading

文件：79.11 Kbytes 页数：5 Pages

Fairchild

仙童半导体

Quad Buffer (3-STATE)

Features ■ High impedance base inputs for reduced loading

文件：66.74 Kbytes 页数：5 Pages

Fairchild

仙童半导体