丝印：74ACT11032N；Package：PDIP；QUADRUPLE 2-INPUT POSITIVE-OR GATES

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages (D), Plastic Shrink Small

文件：326.91 Kbytes 页数：12 Pages

TI

德州仪器

丝印：74ACT11032N；Package：PDIP；QUADRUPLE 2-INPUT POSITIVE-OR GATES

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages (D), Plastic Shrink Small

文件：326.91 Kbytes 页数：12 Pages

TI

德州仪器

丝印：74ACT11032N；Package：PDIP；QUADRUPLE 2-INPUT POSITIVE-OR GATES

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages (D), Plastic Shrink Small

文件：326.91 Kbytes 页数：12 Pages

TI

德州仪器

丝印：74ACT11074N；Package：PDIP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件：664.34 Kbytes 页数：18 Pages

TI

德州仪器

丝印：74ACT11074N；Package：PDIP；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB)

文件：664.34 Kbytes 页数：18 Pages

TI

德州仪器

Advanced CMOS TTL Input

Features Inputs directly accept TTL / NMOS Outputs directly interface CMOS, NMOS and TTL Outputs Sink/Source 24mA Low input current: 1μA High noise immunity Functionally compatible with bipolar 74LS/ALS11. Full military temperature Range

文件：430.03 Kbytes 页数：5 Pages

SS

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Sma

文件：169 Kbytes 页数：7 Pages

TI

德州仪器

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Sma

文件：169 Kbytes 页数：7 Pages

TI

德州仪器

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Sma

文件：169 Kbytes 页数：7 Pages

TI

德州仪器

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Sma

文件：169 Kbytes 页数：7 Pages

TI

德州仪器