UPD98502N7-H6中文资料瑞萨数据手册PDF规格书

FEATURES

• Includes high performance MIPS based 64-bit RISC processor VR4120A

• Can perform RTOS and network middleware (M/W) on the chip

• Includes interface for PROM and flash ROM used for storing boot program

• Includes 32-bit RISC controller in ATM Cell Processor

• Software SAR processing by RISC controller affords flexibility for specification update

• Supports CBR/VBR/UBR service classes

• Include 2-channel 10/100-Mbps Ethernet controllers compliant to IEEE802.3, IEEE 802.3u and IEEE802.3x

• Can directly connect external Ethernet PHY device through 3.3 V MII interface

• Includes USB full speed function controller compliant to USB specification 1.1

• Supports operation conforming to the USB Communication Device Class Specification

• Can directly connect 64-Mbit and 128-Mbit SDRAM as external memory

• Includes 32-bit 33-MHz PCI Bus Master compliant to PCI Specification Rev. 2.2

• Includes 8-bit 16.5/25/33-MHz UTOPIA level 2 interface compliant to ATM Forum af-phy-0039

• Includes boundary scan function (JTAG) compliant to IEEE 1149.1

• Include UART and Micro Wire™ interfaces

• Include 2-ch general purpose timers

• Using advanced CMOS technology

• Power supply 2.5V(Core)/3.3V(I/O)

• Package 500-pin T-BGA